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View Full Version : Vex Ultrasonic Range Sensor (WPILib)


Ether
24-01-2015, 13:02
At 6:33 in this video (https://www.youtube.com/watch?x-yt-cl=84503534&v=J6sgEZ5eJW8&list=PL8BLGj0RyhMz2130a_EaWKeymnyJLvvTP&feature=player_embedded&x-yt-ts=1421914688#t=393), the instructor mentions that there is WPILib support for decoding the signal from the Vex Ultrasonic Range sensor mentioned at 4:17 (https://www.youtube.com/watch?x-yt-cl=84503534&v=J6sgEZ5eJW8&list=PL8BLGj0RyhMz2130a_EaWKeymnyJLvvTP&feature=player_embedded&x-yt-ts=1421914688#t=257) in the video.

Can someone familiar with the relevant WPILib code please clarify how the time to receive the reflected ping is determined? Specifically, is a hardware interrupt set up to detect the reflected ping? If so, does the ISR for that interrupt do the timestamping, or does the ISR just set a flag alert the scheduler to run a task which does the timestamping? Or is the reflected signal detected by polling, and if so, what is the polling frequency and priority?

Joe Ross
24-01-2015, 13:09
It sets up a counter fpga object in semi-period mode.

Ether
24-01-2015, 13:17
It sets up a counter fpga object in semi-period mode.

Thanks Joe. So it would be polled at 1MHz* by FPGA?


*polling frequency increased from 153KHz (2014) to 1MHz (2015)?

Joe Ross
24-01-2015, 16:45
Thanks Joe. So it would be polled at 1MHz* by FPGA?


*polling frequency increased from 153KHz (2014) to 1MHz (2015)?



Yes