Invariant FPGA Image Version Error? [Archive]

View Full Version : Invariant FPGA Image Version Error?

1951-44U

02-02-2010, 23:23

Hi all,

We have trouble now even establishing connection to the robot and testing code (that we actually confirmed earlier as working). Looking at serial output, it seems that there is an "Invariant FPGA Image Version Error", which we used t o be able to fix (then again, maybe not, but it worked for a while) by compiling the WPILib project in WindRiver along with our program. But now that doesn't work at all. And strangely enough, Watchdog errors from within the cpp file seem to pop up randomly without us even establishing a connection to enable the robot!

Observe:

cRIO-907x Boot

Copyright 2007 National Instruments Corp.

Bootrom version: 2.4.7
Creation date: Jul 9 2007, 00:45:07

Press any key to stop auto-boot...
1
0

auto-booting...

boot device : tffs=0,0
unit number : 0
processor number : 0
host name : host
file name : /c/ni-rt/system/vxWorks
flags (f) : 0x8

Mounting tffs...
Attaching to TFFS... Datalight Reliance v3.00.1218T
VxWorks Edition for ppc603
Copyright (c) 2003-2007 Datalight, Inc.
done.
3572144
Starting at 0x100000...

ATA device not detected.

Adding 8459 symbols for standalone.
Mounting onboard storage...
Reliance File System Driver
Datalight Reliance v3.2.2 Build 1376BV
VxWorks Edition for ppc603
Copyright (c) 2003-2008 Datalight, Inc. All Rights Reserved Worldwide.

-> lvusEngine: PPC603 CPU detected...
CPU tick frequency: 33.000674 MHz [Using: 1000 MHz]
MAX system identification name: Team25
Initializing network...
Device 1 - MAC addr: 00:80:2F:11:5A:D1 - 10.0.25.2 /8 (primary - static)
Device 2 - MAC addr: 00:80:2F:11:5A:D2 - 192.168.0.3 /24 (static)

Loading LVRT...
* Loading EarlyStartupLibraries: tsengine
Time sync source: rtc now active
* Loading StartupDlls: debug
Entering debug.o StartupLibraryInit
Debugging is up, target server mounted at /tsfs

VxWorks

Copyright 1984-2006 Wind River Systems, Inc.

CPU: MPC5200 -- Wind River Lite5200 BSP.
Runtime Name: VxWorks
Runtime Version: 6.3
BSP version: 2.0/10
Created: Jul 29 2009, 13:41:47
ED&R Policy Mode: Deployed
WDB Comm Type: WDB_COMM_END
WDB: Ready.

Leaving debug.o StartupLibraryInit
* Loading StartupDlls: NiRioRpc
* Loading StartupDlls: niorbs
* Loading StartupDlls: NiViSrvr
* Loading StartupDlls: nivissvc
task 0xec2ca8 (PAL00f94048) deleted: errno=0 (0) status=0 (0)
NI-RIO Server 3.2 started successfully.
task 0xc3e0f8 (NiRioRpc) deleted: errno=0 (0) status=0 (0)
* Loading StartupDlls: nivision
* Loading StartupDlls: niserial
* Loading StartupDlls: FRC_FPGA
* Loading StartupDlls: FRC_NetworkCommunication
FRC_NetworkCommunication was compiled from SVN revision 2064
Error, Invariant FPGA image version error!
FPGA Hardware GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Software GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Hardware Version: 49391
FPGA Software Version: 49391
FPGA Hardware Revision: 1.0.0
FPGA Software Revision: 1.0.0
FPGA Hardware GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Software GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Hardware Version: 2010
FPGA Software Version: 2010
FPGA Hardware Revision: 1.3.0
FPGA Software Revision: 1.3.0
* Loading StartupDlls: FRC_UserProgram
ERROR: Network communication failed to initialize!
WPILib was compiled from SVN revision 2069

>>>>ERROR: status == -63194 (0xFFFF0926) in Watchdog() in C:/WindRiver/workspace/WPILib/Watchdog.cpp at line 18

>>>>ERROR: status == -63194 (0xFFFF0926) in SetExpiration() in C:/WindRiver/workspace/WPILib/Watchdog.cpp at line 97

>>>>ERROR: status == -63194 (0xFFFF0926) in SetEnabled() in C:/WindRiver/workspace/WPILib/Watchdog.cpp at line 127

Welcome to LabVIEW Real-Time 8.6.1f2
task 0x2199958 (t2) deleted: errno=0 (0) status=0 (0)

NI-VISA Server 4.5 started successfully.
task 0xe412d0 (t1) deleted: errno=1835009 (0x1c0001) status=1 (0x1)

During all this, we can always download code to the robot in WindRiver (albeit slowly) without a robot connection to the Classmate by connecting the Classmate and programming laptop to the Router and doing it all wirelessly. Occasionally, the FRC_NetworkCommunication would work, but we would still get the Invariant FPGA Image Version error and be unable to enable the robot, as it throws a "No Code" error.

We have all the updates listed on the WPI website under C++ (Workbench Update, reloaded WPILib, Labview Update, DS Update, image v19, all of 'em). Any ideas on this one?

jhersh

03-02-2010, 02:42

Wow. This one really stumps me. It reports a version error even though it is clearly able to deploy the image and even print the matching version (the "hardware" GUID, version, and revision). I looked closely at the code that generates this messaage, and it is caused by not being able to open the handle to the FPGA image after it is downloaded. I'll have to get back to you on this one.

-Joe

jhersh

03-02-2010, 02:51

Hi,

I'd like you to replace the attached file (unzipped, of course) on your cRIO and reboot your controller, capturing the boot messages just like you did before. It goes in "/ni-rt/system/". I added a few prints that will hopefully point to what is going on.

Thanks,
-Joe

1951-44U

03-02-2010, 15:25

Here is what happened:

When we loaded the file in via FTP Client (FileZilla), we rebooted the robot. We intently watched the serial output and found (to our surprise) that everything started up normally! However, upon enabling, a "Watchdog Not Fed" error shows up on the Classmate as a status. So we reloaded our program. But then upon reboot we get the same error as before.

Here is the output:

cRIO-907x Boot

Copyright 2007 National Instruments Corp.

Bootrom version: 2.4.7
Creation date: Jul 9 2007, 00:45:07

A

Press any key to stop auto-boot...
1
0

auto-booting...

boot device : tffs=0,0
unit number : 0
processor number : 0
host name : host
file name : /c/ni-rt/system/vxWorks
flags (f) : 0x8

Mounting tffs...
Attaching to TFFS... Datalight Reliance v3.00.1218T
VxWorks Edition for ppc603
Copyright (c) 2003-2007 Datalight, Inc.
done.
3554816
Starting at 0x100000...

ATA device not detected.

Adding 8332 symbols for standalone.
Mounting onboard storage...
Datalight Reliance v3.00.1218T
VxWorks Edition for ppc603
Copyright (c) 2003-2007 Datalight, Inc.

-> lvusEngine: PPC603 CPU detected...
CPU tick frequency: 33.000675 MHz [Using: 1000 MHz]
MAX system identification name: Team25
Initializing network... Static IP address assigned.
Device 1 - MAC address: 00:80:2F:11:5A:D1 - 10.0.25.2 (primary)
Device 2 - MAC address: 00:80:2F:11:5A:D2 - 192.168.0.3 (secondary)

Loading LVRT...
Time sync source: rtc now active
Entering debug.o StartupLibraryInit
Debugging is up, target server mounted at /tsfs

VxWorks

Copyright 1984-2006 Wind River Systems, Inc.

CPU: MPC5200 -- Wind River Lite5200 BSP.
Runtime Name: VxWorks
Runtime Version: 6.3
BSP version: 2.0/10
Created: Dec 8 2008, 15:28:17
ED&R Policy Mode: Deployed
WDB Comm Type: WDB_COMM_END
WDB: Ready.

Leaving debug.o StartupLibraryInit
task 0x132f4d0 (Service Locator Thread 3) deleted: errno=0 (0) status=0 (0)
NI-RIO Server 3.1 started successfully.
task 0x10b7db0 (NiRioRpc) deleted: errno=0 (0) status=0 (0)
task 0x1c54310 (Service Locator Thread 4) deleted: errno=0 (0) status=0 (0)
task 0x1c86ef8 (Service Locator Thread 5) deleted: errno=0 (0) status=0 (0)
task 0x1c2a470 (t2) deleted: errno=0 (0) status=0 (0)
task 0x1ce1668 (ServerAds.Lookup) deleted: errno=13893648 (0xd40010) status=0 (0)

NI-VISA Server 4.4 started successfully.
task 0x1a8e838 (t1) deleted: errno=1835009 (0x1c0001) status=1 (0x1)
task 0x1d01668 (ServerAds.Lookup) deleted: errno=13893648 (0xd40010) status=0 (0)
FRC Control Environment initialized
FRC_NetworkCommunication was compiled from SVN revision 1888
FPGA Hardware GUID: 0x6F0EA7B88ADB8E3FD4127A39E3502C6D
FPGA Software GUID: 0x6F0EA7B88ADB8E3FD4127A39E3502C6D
FPGA Hardware Version: 2009
FPGA Software Version: 2009
FPGA Hardware Revision: 1.0.0
FPGA Software Revision: 1.0.0
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 8writeI2CDataToSendEjPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO2 6writeI2CConfig_BytesToReadEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter28writeTimerConfig_StallPeriodEjPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAI11 writeConfigENS1_7tConfigEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter34writeConfig_UpSource_AnalogTriggerEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E9tWatc hdog12readImmortalEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO2 2writeI2CConfig_AddressEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E9tWatc hdog14readExpirationEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO2 2readSlowValue_RelayFwdEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E12tAcc umulator13writeDeadbandEiPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter23readTimerOutput_StalledEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol getDynamicControlData.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter11strobeResetEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E9tWatc hdog23readStatus_SystemActiveEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun terD1Ev.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTrigger24writeSourceSelect_FilterEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTrigger25writeSourceSelect_ChannelEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E9tWatc hdogC1EPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E7tGlob al11readVersionEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO2 2writePWMConfig_MinHighEtPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTrigger15writeLowerLimitEiPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO9 readPulseEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 9writePWMPeriodScaleEhhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTrigger15writeUpperLimitEiPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTrigger25readSourceSelect_AveragedEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO2 7writeI2CConfig_BytesToWriteEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E9tWatc hdog16readStatus_AliveEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 0writePulseEtPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 8readI2CStatus_DoneEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAI15 readAverageBitsEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTriggerD1Ev.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol setErrorData.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter28writeConfig_UpSource_ChannelEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E9tWatc hdog10strobeFeedEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTrigger26writeSourceSelect_AveragedEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E7tGlob al13writeFPGA_LEDEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E10tInt errupt32writeConfig_Source_AnalogTriggerEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E9tWatc hdog10strobeKillEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter36writeConfig_DownSource_AnalogTriggerEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E12tAcc umulatorC1EhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E10tInt errupt13readTimeStampEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter32writeConfig_PulseLengthThresholdEtPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter30writeConfig_DownSource_ChannelEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 7writeOutputEnableEtPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E12tAcc umulator16readOutput_CountEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO2 2readSlowValue_RelayRevEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter25writeConfig_UpFallingEdgeEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTrigger23readSourceSelect_FilterEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter27writeConfig_DownFallingEdgeEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E9tWatc hdogD1Ev.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 6writePulseLengthEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 6readOutputEnableEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAI15 writeReadSelectENS1_11tReadSelectEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol overrideIOConfig.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 4strobeI2CStartEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 4readLoopTimingEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E10tInt errupt22writeConfig_RisingEdgeEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIOC 1EhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter15readConfig_ModeEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO7 writeDOEtPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E7tGlob al12readFPGA_LEDEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter27writeConfig_UpSource_ModuleEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter17readConfig_EnableEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E10tInt errupt25writeConfig_Source_ModuleEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAI19 writeOversampleBitsEhhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun terC1EhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTrigger20readOutput_OverLimitEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO2 1writePWMConfig_PeriodEtPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAI18 readOversampleBitsEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO6 readDIEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E9tWatc hdog13writeImmortalEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter28writeTimerConfig_AverageSizeEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E12tAcc umulator10readOutputEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 3writePWMValueEhhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter16readOutput_ValueEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAI17 strobeLatchOutputEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E12tAcc umulator11writeCenterEiPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E10tInt erruptD1Ev.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAID1 Ev.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIOD 1Ev.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter18writeConfig_EnableEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter26writeConfig_DownRisingEdgeEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter32writeTimerConfig_UpdateWhenEmptyEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAI14 readLoopTimingEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO6 readDOEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol FRC_NetworkCommunication_observeUserProgramStartin g.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAI19 readConfig_ScanSizeEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTriggerC1EhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter29writeConfig_DownSource_ModuleEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAI16 writeAverageBitsEhhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E10tInt errupt23writeConfig_FallingEdgeEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E7tGlob al13readLocalTimeEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO2 5readI2CStatus_TransactionEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E10tInt errupt22writeConfig_WaitForAckEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter20readOutput_DirectionEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E9tWatc hdog15writeExpirationEjPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E12tAcc umulator16readOutput_ValueEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAI10 readOutputEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTrigger24writeSourceSelect_ModuleEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter16writeConfig_ModeEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E7tGlob alD1Ev.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAIC1 EhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter24writeConfig_UpRisingEdgeEbPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E7tGlob al12readRevisionEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E7tGlob alC1EPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E3tAI13 writeScanListEhhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 9readI2CDataReceivedEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E9tWatc hdog9readTimerEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO2 3writeSlowValue_RelayFwdEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO2 3writeSlowValue_RelayRevEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E14tAna logTrigger23readOutput_InHysteresisEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E10tInt errupt26writeConfig_Source_ChannelEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol getCommonControlData.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E10tInt erruptC1EhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E4tDIO1 2readPWMValueEhPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E12tAcc umulator11strobeResetEPi.
Warning: module 0x1cff688 (FRC_UserProgram.out) holds reference to undefined symbol _ZN5nFPGA33nAD9A5591CC64E4DF756D77D1B57A549E8tCoun ter15readTimerOutputEPi.
(unloading partially loaded module FRC_UserProgram.out)

Welcome to LabVIEW Real-Time 8.6.1f2
task 0x1ed8608 (FTP Server Connection Thread) deleted: errno=22 (0x16) status=0 (0)

cRIO-907x Boot

Copyright 2007 National Instruments Corp.

Bootrom version: 2.4.7
Creation date: Jul 9 2007, 00:45:07

W

Press any key to stop auto-boot...
1
0

auto-booting...

boot device : tffs=0,0
unit number : 0
processor number : 0
host name : host
file name : /c/ni-rt/system/vxWorks
flags (f) : 0x8

Mounting tffs...
Attaching to TFFS... Datalight Reliance v3.00.1218T
VxWorks Edition for ppc603
Copyright (c) 2003-2007 Datalight, Inc.
done.
3572144
Starting at 0x100000...

ATA device not detected.

Adding 8459 symbols for standalone.
Mounting onboard storage...
Reliance File System Driver
Datalight Reliance v3.2.2 Build 1376BV
VxWorks Edition for ppc603
Copyright (c) 2003-2008 Datalight, Inc. All Rights Reserved Worldwide.

-> lvusEngine: PPC603 CPU detected...
CPU tick frequency: 33.000685 MHz [Using: 1000 MHz]
MAX system identification name: Team25
Initializing network...
Device 1 - MAC addr: 00:80:2F:11:5A:D1 - 10.0.25.2 /8 (primary - static)
Device 2 - MAC addr: 00:80:2F:11:5A:D2 - 192.168.0.3 /24 (static)

Loading LVRT...
* Loading EarlyStartupLibraries: tsengine
Time sync source: rtc now active
* Loading StartupDlls: debug
Entering debug.o StartupLibraryInit
Debugging is up, target server mounted at /tsfs

VxWorks

Copyright 1984-2006 Wind River Systems, Inc.

CPU: MPC5200 -- Wind River Lite5200 BSP.
Runtime Name: VxWorks
Runtime Version: 6.3
BSP version: 2.0/10
Created: Jul 29 2009, 13:41:47
ED&R Policy Mode: Deployed
WDB Comm Type: WDB_COMM_END
WDB: Ready.

Leaving debug.o StartupLibraryInit
* Loading StartupDlls: NiRioRpc
* Loading StartupDlls: niorbs
* Loading StartupDlls: NiViSrvr
* Loading StartupDlls: nivissvc
task 0xec2ca8 (PAL00f94060) deleted: errno=0 (0) status=0 (0)
NI-RIO Server 3.2 started successfully.
task 0xc3e100 (NiRioRpc) deleted: errno=0 (0) status=0 (0)
* Loading StartupDlls: nivision
* Loading StartupDlls: niserial
* Loading StartupDlls: FRC_FPGA
* Loading StartupDlls: FRC_NetworkCommunication
FRC_NetworkCommunication was compiled from SVN revision 2123
FPGA Hardware GUID: 0x000000000000000000000000AD9A5591
FPGA Software GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Hardware Version: 2010
FPGA Software Version: 2010
FPGA Hardware Revision: 1.3.0
FPGA Software Revision: 1.3.0
* Loading StartupDlls: FRC_UserProgram
WPILib was compiled from SVN revision 2069
task 0x2198b30 (t2) deleted: errno=0 (0) status=0 (0)

Welcome to LabVIEW Real-Time 8.6.1f2

NI-VISA Server 4.5 started successfully.
task 0xe412d0 (t1) deleted: errno=1835009 (0x1c0001) status=1 (0x1)
Default Disabled() method... Overload me!
task 0x21c09d0 (FTP Server Connection Thread) deleted: errno=22 (0x16) status=0 (0)

cRIO-907x Boot

Copyright 2007 National Instruments Corp.

Bootrom version: 2.4.7
Creation date: Jul 9 2007, 00:45:07

Press any key to stop auto-boot...
1
0

auto-booting...

boot device : tffs=0,0
unit number : 0
processor number : 0
host name : host
file name : /c/ni-rt/system/vxWorks
flags (f) : 0x8

Mounting tffs...
Attaching to TFFS... Datalight Reliance v3.00.1218T
VxWorks Edition for ppc603
Copyright (c) 2003-2007 Datalight, Inc.
done.
3572144
Starting at 0x100000...

ATA device not detected.

Adding 8459 symbols for standalone.
Mounting onboard storage...
Reliance File System Driver
Datalight Reliance v3.2.2 Build 1376BV
VxWorks Edition for ppc603
Copyright (c) 2003-2008 Datalight, Inc. All Rights Reserved Worldwide.

-> lvusEngine: PPC603 CPU detected...
CPU tick frequency: 33.000667 MHz [Using: 1000 MHz]
MAX system identification name: Team25
Initializing network...
Device 1 - MAC addr: 00:80:2F:11:5A:D1 - 10.0.25.2 /8 (primary - static)
Device 2 - MAC addr: 00:80:2F:11:5A:D2 - 192.168.0.3 /24 (static)

Loading LVRT...
* Loading EarlyStartupLibraries: tsengine
Time sync source: rtc now active
* Loading StartupDlls: debug
Entering debug.o StartupLibraryInit
Debugging is up, target server mounted at /tsfs

VxWorks

Copyright 1984-2006 Wind River Systems, Inc.

CPU: MPC5200 -- Wind River Lite5200 BSP.
Runtime Name: VxWorks
Runtime Version: 6.3
BSP version: 2.0/10
Created: Jul 29 2009, 13:41:47
ED&R Policy Mode: Deployed
WDB Comm Type: WDB_COMM_END
WDB: Ready.

Leaving debug.o StartupLibraryInit
* Loading StartupDlls: NiRioRpc
* Loading StartupDlls: niorbs
* Loading StartupDlls: NiViSrvr
* Loading StartupDlls: nivissvc
task 0xec2d48 (PAL00f94100) deleted: errno=0 (0) status=0 (0)
NI-RIO Server 3.2 started successfully.
task 0xc3e198 (NiRioRpc) deleted: errno=0 (0) status=0 (0)
* Loading StartupDlls: nivision
* Loading StartupDlls: niserial
* Loading StartupDlls: FRC_FPGA
* Loading StartupDlls: FRC_NetworkCommunication
FRC_NetworkCommunication was compiled from SVN revision 2123
Error, Invariant FPGA image version error! (-63194)
FPGA Hardware GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Software GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Hardware Version: 49391
FPGA Software Version: 49391
FPGA Hardware Revision: 1.0.0
FPGA Software Revision: 1.0.0
FPGA Hardware GUID: 0x756D77D1B57A549EAD9A5591CC64E4DF
FPGA Software GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Hardware Version: 2010
FPGA Software Version: 2010
FPGA Hardware Revision: 1.3.0
FPGA Software Revision: 1.3.0
* Loading StartupDlls: FRC_UserProgram
ERROR: Network communication failed to initialize!

Thanks for your help so far.

byteit101

03-02-2010, 16:10

Is the cRIO imaged at v19?
is windriver updated to 4? (http://first.wpi.edu/FRC/frccupdates.html)

1951-44U

03-02-2010, 16:13

Yes. As the last paragraph of my first post says.

G-Money

03-02-2010, 16:18

It looks like this might be an issue with the hardware itself. I can see from the boot sequence that you reimaged the cRIO (FPGA Software Version 1.3.0) and the you do have the new OUT file on board (FRC_Communication was compiled from SVN revision 2123) and it's doing it's job (the error isn't being reported anymore) but it's still present. Give NI a call this afternoon and we can go ahead and start the Return Mechandise Action so we can get you a new cRIO as quickly as possible.

1951-44U

03-02-2010, 16:21

Welcome to Chief Delphi, btw.

We have called NI and the problem is going up to the R&D, who are working on it now, waiting for replies on this topic. This topic is my lifeline to NI and to get the robot to work.

jhersh

03-02-2010, 16:24

1951-44U

03-02-2010, 16:34

Here are 5 other reboots for ya (i think you may be right):

cRIO-907x Boot

Copyright 2007 National Instruments Corp.

Bootrom version: 2.4.7
Creation date: Jul 9 2007, 00:45:07

_

Press any key to stop auto-boot...
1
0

auto-booting...

boot device : tffs=0,0
unit number : 0
processor number : 0
host name : host
file name : /c/ni-rt/system/vxWorks
flags (f) : 0x8

Mounting tffs...
Attaching to TFFS... Datalight Reliance v3.00.1218T
VxWorks Edition for ppc603
Copyright (c) 2003-2007 Datalight, Inc.
done.
3572144
Starting at 0x100000...

ATA device not detected.

Adding 8459 symbols for standalone.
Mounting onboard storage...
Reliance File System Driver
Datalight Reliance v3.2.2 Build 1376BV
VxWorks Edition for ppc603
Copyright (c) 2003-2008 Datalight, Inc. All Rights Reserved Worldwide.

-> lvusEngine: PPC603 CPU detected...
CPU tick frequency: 33.000741 MHz [Using: 1000 MHz]
MAX system identification name: Team25
Initializing network...
Device 1 - MAC addr: 00:80:2F:11:5A:D1 - 10.0.25.2 /8 (primary - static)
Device 2 - MAC addr: 00:80:2F:11:5A:D2 - 192.168.0.3 /24 (static)

Loading LVRT...
* Loading EarlyStartupLibraries: tsengine
Time sync source: rtc now active
* Loading StartupDlls: debug
Entering debug.o StartupLibraryInit
Debugging is up, target server mounted at /tsfs

VxWorks

Copyright 1984-2006 Wind River Systems, Inc.

CPU: MPC5200 -- Wind River Lite5200 BSP.
Runtime Name: VxWorks
Runtime Version: 6.3
BSP version: 2.0/10
Created: Jul 29 2009, 13:41:47
ED&R Policy Mode: Deployed
WDB Comm Type: WDB_COMM_END
WDB: Ready.

Leaving debug.o StartupLibraryInit
* Loading StartupDlls: NiRioRpc
* Loading StartupDlls: niorbs
* Loading StartupDlls: NiViSrvr
* Loading StartupDlls: nivissvc
task 0xec2cd8 (PAL00f94078) deleted: errno=0 (0) status=0 (0)
NI-RIO Server 3.2 started successfully.
task 0xc3e130 (NiRioRpc) deleted: errno=0 (0) status=0 (0)
* Loading StartupDlls: nivision
* Loading StartupDlls: niserial
* Loading StartupDlls: FRC_FPGA
* Loading StartupDlls: FRC_NetworkCommunication
FRC_NetworkCommunication was compiled from SVN revision 2123
Error, Invariant FPGA image version error! (-63194)
FPGA Hardware GUID: 0x0AF07C6B1E53E3F869DC0EE6C45E6FA9
FPGA Software GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Hardware Version: 49391
FPGA Software Version: 49391
FPGA Hardware Revision: 1.0.0
FPGA Software Revision: 1.0.0
FPGA Hardware GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Software GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Hardware Version: 2010
FPGA Software Version: 2010
FPGA Hardware Revision: 1.3.0
FPGA Software Revision: 1.3.0
* Loading StartupDlls: FRC_UserProgram
ERROR: Network communication failed to initialize!

cRIO-907x Boot

Copyright 2007 National Instruments Corp.

Bootrom version: 2.4.7
Creation date: Jul 9 2007, 00:45:07

Press any key to stop auto-boot...
1
0

auto-booting...

boot device : tffs=0,0
unit number : 0
processor number : 0
host name : host
file name : /c/ni-rt/system/vxWorks
flags (f) : 0x8

Mounting tffs...
Attaching to TFFS... Datalight Reliance v3.00.1218T
VxWorks Edition for ppc603
Copyright (c) 2003-2007 Datalight, Inc.
done.
3572144
Starting at 0x100000...

ATA device not detected.

Adding 8459 symbols for standalone.
Mounting onboard storage...
Reliance File System Driver
Datalight Reliance v3.2.2 Build 1376BV
VxWorks Edition for ppc603
Copyright (c) 2003-2008 Datalight, Inc. All Rights Reserved Worldwide.

-> lvusEngine: PPC603 CPU detected...
CPU tick frequency: 33.000718 MHz [Using: 1000 MHz]
MAX system identification name: Team25
Initializing network...
Device 1 - MAC addr: 00:80:2F:11:5A:D1 - 10.0.25.2 /8 (primary - static)
Device 2 - MAC addr: 00:80:2F:11:5A:D2 - 192.168.0.3 /24 (static)

Loading LVRT...
* Loading EarlyStartupLibraries: tsengine
Time sync source: rtc now active
* Loading StartupDlls: debug
Entering debug.o StartupLibraryInit
Debugging is up, target server mounted at /tsfs

VxWorks

Copyright 1984-2006 Wind River Systems, Inc.

CPU: MPC5200 -- Wind River Lite5200 BSP.
Runtime Name: VxWorks
Runtime Version: 6.3
BSP version: 2.0/10
Created: Jul 29 2009, 13:41:47
ED&R Policy Mode: Deployed
WDB Comm Type: WDB_COMM_END
WDB: Ready.

Leaving debug.o StartupLibraryInit
* Loading StartupDlls: NiRioRpc
* Loading StartupDlls: niorbs
* Loading StartupDlls: NiViSrvr
* Loading StartupDlls: nivissvc
task 0xec2d58 (PAL00f940b8) deleted: errno=0 (0) status=0 (0)
NI-RIO Server 3.2 started successfully.
task 0xc3e1a8 (NiRioRpc) deleted: errno=0 (0) status=0 (0)
* Loading StartupDlls: nivision
* Loading StartupDlls: niserial
* Loading StartupDlls: FRC_FPGA
* Loading StartupDlls: FRC_NetworkCommunication
FRC_NetworkCommunication was compiled from SVN revision 2123
Error, Invariant FPGA image version error! (-63194)
FPGA Hardware GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Software GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Hardware Version: 49391
FPGA Software Version: 49391
FPGA Hardware Revision: 1.0.0
FPGA Software Revision: 1.0.0
FPGA Hardware GUID: 0x00000000000000000000000000000000
FPGA Software GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Hardware Version: 2010
FPGA Software Version: 2010
FPGA Hardware Revision: 1.3.0
FPGA Software Revision: 1.3.0
* Loading StartupDlls: FRC_UserProgram
WPILib was compiled from SVN revision 2069
task 0x219ab60 (t2) deleted: errno=0 (0) status=0 (0)

Welcome to LabVIEW Real-Time 8.6.1f2

NI-VISA Server 4.5 started successfully.
task 0xe41540 (t1) deleted: errno=1835009 (0x1c0001) status=1 (0x1)
Default Disabled() method... Overload me!

cRIO-907x Boot

Copyright 2007 National Instruments Corp.

Bootrom version: 2.4.7
Creation date: Jul 9 2007, 00:45:07

Press any key to stop auto-boot...
1
0

auto-booting...

boot device : tffs=0,0
unit number : 0
processor number : 0
host name : host
file name : /c/ni-rt/system/vxWorks
flags (f) : 0x8

Mounting tffs...
Attaching to TFFS... Datalight Reliance v3.00.1218T
VxWorks Edition for ppc603
Copyright (c) 2003-2007 Datalight, Inc.
done.
3572144
Starting at 0x100000...

ATA device not detected.

Adding 8459 symbols for standalone.
Mounting onboard storage...
Reliance File System Driver
Datalight Reliance v3.2.2 Build 1376BV
VxWorks Edition for ppc603
Copyright (c) 2003-2008 Datalight, Inc. All Rights Reserved Worldwide.

-> lvusEngine: PPC603 CPU detected...
CPU tick frequency: 33.000699 MHz [Using: 1000 MHz]
MAX system identification name: Team25
Initializing network...
Device 1 - MAC addr: 00:80:2F:11:5A:D1 - 10.0.25.2 /8 (primary - static)
Device 2 - MAC addr: 00:80:2F:11:5A:D2 - 192.168.0.3 /24 (static)

Loading LVRT...
* Loading EarlyStartupLibraries: tsengine
Time sync source: rtc now active
* Loading StartupDlls: debug
Entering debug.o StartupLibraryInit
Debugging is up, target server mounted at /tsfs

VxWorks

Copyright 1984-2006 Wind River Systems, Inc.

CPU: MPC5200 -- Wind River Lite5200 BSP.
Runtime Name: VxWorks
Runtime Version: 6.3
BSP version: 2.0/10
Created: Jul 29 2009, 13:41:47
ED&R Policy Mode: Deployed
WDB Comm Type: WDB_COMM_END
WDB: Ready.

Leaving debug.o StartupLibraryInit
* Loading StartupDlls: NiRioRpc
* Loading StartupDlls: niorbs
* Loading StartupDlls: NiViSrvr
* Loading StartupDlls: nivissvc
task 0xec2bb8 (PAL00f94038) deleted: errno=0 (0) status=0 (0)
NI-RIO Server 3.2 started successfully.
task 0xc3e0f8 (NiRioRpc) deleted: errno=0 (0) status=0 (0)
* Loading StartupDlls: nivision
* Loading StartupDlls: niserial
* Loading StartupDlls: FRC_FPGA
* Loading StartupDlls: FRC_NetworkCommunication
FRC_NetworkCommunication was compiled from SVN revision 2123
Error, Invariant FPGA image version error! (-63194)
FPGA Hardware GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Software GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Hardware Version: 49391
FPGA Software Version: 49391
FPGA Hardware Revision: 1.0.0
FPGA Software Revision: 1.0.0
FPGA Hardware GUID: 0xB57A549EAD9A5591CC64E4DF756D77D1
FPGA Software GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Hardware Version: 2010
FPGA Software Version: 2010
FPGA Hardware Revision: 1.3.0
FPGA Software Revision: 1.3.0
* Loading StartupDlls: FRC_UserProgram
ERROR: Network communication failed to initialize!

cRIO-907x Boot

Copyright 2007 National Instruments Corp.

Bootrom version: 2.4.7
Creation date: Jul 9 2007, 00:45:07

Press any key to stop auto-boot...
1
0

auto-booting...

boot device : tffs=0,0
unit number : 0
processor number : 0
host name : host
file name : /c/ni-rt/system/vxWorks
flags (f) : 0x8

Mounting tffs...
Attaching to TFFS... Datalight Reliance v3.00.1218T
VxWorks Edition for ppc603
Copyright (c) 2003-2007 Datalight, Inc.
done.
3572144
Starting at 0x100000...

ATA device not detected.

Adding 8459 symbols for standalone.
Mounting onboard storage...
Reliance File System Driver
Datalight Reliance v3.2.2 Build 1376BV
VxWorks Edition for ppc603
Copyright (c) 2003-2008 Datalight, Inc. All Rights Reserved Worldwide.

-> lvusEngine: PPC603 CPU detected...
CPU tick frequency: 33.000693 MHz [Using: 1000 MHz]
MAX system identification name: Team25
Initializing network...
Device 1 - MAC addr: 00:80:2F:11:5A:D1 - 10.0.25.2 /8 (primary - static)
Device 2 - MAC addr: 00:80:2F:11:5A:D2 - 192.168.0.3 /24 (static)

Loading LVRT...
* Loading EarlyStartupLibraries: tsengine
Time sync source: rtc now active
* Loading StartupDlls: debug
Entering debug.o StartupLibraryInit
Debugging is up, target server mounted at /tsfs

VxWorks

Copyright 1984-2006 Wind River Systems, Inc.

CPU: MPC5200 -- Wind River Lite5200 BSP.
Runtime Name: VxWorks
Runtime Version: 6.3
BSP version: 2.0/10
Created: Jul 29 2009, 13:41:47
ED&R Policy Mode: Deployed
WDB Comm Type: WDB_COMM_END
WDB: Ready.

Leaving debug.o StartupLibraryInit
* Loading StartupDlls: NiRioRpc
* Loading StartupDlls: niorbs
* Loading StartupDlls: NiViSrvr
* Loading StartupDlls: nivissvc
task 0xec2dd8 (PAL00f94178) deleted: errno=0 (0) status=0 (0)
NI-RIO Server 3.2 started successfully.
task 0xc3e230 (NiRioRpc) deleted: errno=0 (0) status=0 (0)
* Loading StartupDlls: nivision
* Loading StartupDlls: niserial
* Loading StartupDlls: FRC_FPGA
* Loading StartupDlls: FRC_NetworkCommunication
FRC_NetworkCommunication was compiled from SVN revision 2123
Error, Invariant FPGA image version error! (-63194)
FPGA Hardware GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Software GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Hardware Version: 49391
FPGA Software Version: 49391
FPGA Hardware Revision: 1.0.0
FPGA Software Revision: 1.0.0
FPGA Hardware GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Software GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Hardware Version: 2010
FPGA Software Version: 2010
FPGA Hardware Revision: 1.3.0
FPGA Software Revision: 1.3.0
* Loading StartupDlls: FRC_UserProgram
ERROR: Network communication failed to initialize!

cRIO-907x Boot

Copyright 2007 National Instruments Corp.

Bootrom version: 2.4.7
Creation date: Jul 9 2007, 00:45:07

Press any key to stop auto-boot...
1
0

auto-booting...

boot device : tffs=0,0
unit number : 0
processor number : 0
host name : host
file name : /c/ni-rt/system/vxWorks
flags (f) : 0x8

Mounting tffs...
Attaching to TFFS... Datalight Reliance v3.00.1218T
VxWorks Edition for ppc603
Copyright (c) 2003-2007 Datalight, Inc.
done.
3572144
Starting at 0x100000...

ATA device not detected.

Adding 8459 symbols for standalone.
Mounting onboard storage...
Reliance File System Driver
Datalight Reliance v3.2.2 Build 1376BV
VxWorks Edition for ppc603
Copyright (c) 2003-2008 Datalight, Inc. All Rights Reserved Worldwide.

-> lvusEngine: PPC603 CPU detected...
CPU tick frequency: 33.000689 MHz [Using: 1000 MHz]
MAX system identification name: Team25
Initializing network...
Device 1 - MAC addr: 00:80:2F:11:5A:D1 - 10.0.25.2 /8 (primary - static)
Device 2 - MAC addr: 00:80:2F:11:5A:D2 - 192.168.0.3 /24 (static)

Loading LVRT...
* Loading EarlyStartupLibraries: tsengine
Time sync source: rtc now active
* Loading StartupDlls: debug
Entering debug.o StartupLibraryInit
Debugging is up, target server mounted at /tsfs

VxWorks

Copyright 1984-2006 Wind River Systems, Inc.

CPU: MPC5200 -- Wind River Lite5200 BSP.
Runtime Name: VxWorks
Runtime Version: 6.3
BSP version: 2.0/10
Created: Jul 29 2009, 13:41:47
ED&R Policy Mode: Deployed
WDB Comm Type: WDB_COMM_END
WDB: Ready.

Leaving debug.o StartupLibraryInit
* Loading StartupDlls: NiRioRpc
* Loading StartupDlls: niorbs
* Loading StartupDlls: NiViSrvr
* Loading StartupDlls: nivissvc
task 0xec2e48 (PAL00f941e8) deleted: errno=0 (0) status=0 (0)
NI-RIO Server 3.2 started successfully.
task 0xc3e298 (NiRioRpc) deleted: errno=0 (0) status=0 (0)
* Loading StartupDlls: nivision
* Loading StartupDlls: niserial
* Loading StartupDlls: FRC_FPGA
* Loading StartupDlls: FRC_NetworkCommunication
FRC_NetworkCommunication was compiled from SVN revision 2123
Error, Invariant FPGA image version error! (-63194)
FPGA Hardware GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Software GUID: 0x1E53E3F869DC0EE6C45E6FA90AF07C6B
FPGA Hardware Version: 49391
FPGA Software Version: 49391
FPGA Hardware Revision: 1.0.0
FPGA Software Revision: 1.0.0
FPGA Hardware GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Software GUID: 0xAD9A5591CC64E4DF756D77D1B57A549E
FPGA Hardware Version: 2010
FPGA Software Version: 2010
FPGA Hardware Revision: 1.3.0
FPGA Software Revision: 1.3.0
* Loading StartupDlls: FRC_UserProgram
ERROR: Network communication failed to initialize!

G-Money

03-02-2010, 16:38

Let's see if my profile changes take effect now...

Sorry but I was the AE that you talked to on the phone just a little bit ago. There isn't any contact information for your Team Advisor so I couldn't call you guys back so I thought I would post back here since I told you to monitor it.

I talked with Joe about the issue and we think that it is probably something hardware related because it looks like the FPGA doesn't register properly.

It looks like the booting multiple times is also pointing to the same thing. Give us a call and we can pick up the troubleshooting again. Thanks!!

1951-44U

03-02-2010, 23:13

Just to satisfy my curiosity, what caused those Watchdog.cpp errors in the data I posted in the first post of this topic?

jhersh

04-02-2010, 00:05

Just to satisfy my curiosity, what caused those Watchdog.cpp errors in the data I posted in the first post of this topic?

The Watchdog class uses the FPGA chip object interface like all others. One of the first things each class does is check that the FPGA is the right version for the class. If the GUID reads fail, it won't match and will return that same version mismatch error.

Wayne C.

04-02-2010, 06:07

Joe-

This is the head coach for 25. I spoke to NI yesterday after Phil was on for quite a while and they want us to return the unit. They were to be sending us a cRIO and we are supposed to return our unit in the box once it arrives. However they had no idea when or if another cRIO would be available any time soon.

Time is of the essence here. We cannot afford even a few days lost. Do you have any idea whether units are/will be available in the next day or so? Apparently we cant even buy a new one.

WC

StephBrierty

04-02-2010, 13:54

Hi guys -
There has been some confusion on this and so the following will be in the team update going out tomorrow:

Teams that need to send their cRIO-FRC back to National Instruments for repair will get a replacement sent overnight to them if it is in NI's system before 4pm Central, otherwise it will be processed and overnighted the next day.
NOTE: This is at the mercy of other teams however. We only have so many in stock and if teams that request this do not send theirs back to get repaired in a timely matter, our stock can get low. We are currently fine though.

Teams purchasing spare or extra cRIOs will receive their systems in approximately 2 weeks.

Let me know if you have any particular questions on here or via email (see below). Thanks!

Wayne C.

04-02-2010, 18:10

Thanks NI-

today I had numerous contacts with your people and confusion from yesterday was cleared up. The cRIO replacement is on the way. Your staff handled it all with compassion and I thank you for it.

WC