CRIO 9201 Analog Sampling Rate & Averaging
 

Hi Folks,

I've got a few questions that I could use a little clarification with.

I was looking at the Analog Open.VI and I believe I see it setting the sampling rate to 50K for all 8 of the channels by default. Is this correct or I am misunderstanding it?

There are VI's to change the sampling rates, set oversampling and averaging bits, however, I don't see anywhere a simple averaging of samples.

If I'm sampling at 50K I believe you could easily average every 100 samples to obtain a steadier signal at the expense of some lag.

Is there sample averaging being done by the FPGA that I'm not seeing? If so can someone tell me what it is? Is there something I'm missing that allows me to configure this?

Thanks,
Michael

Re: CRIO 9201 Analog Sampling Rate & Averaging
 

Correct

Yes, the FPGA does averaging, if you configure it, using the set averaging bits VI. Rather then telling it to oversample or average 100 samples, you would tell it to oversample or average 6 bits (64 samples) or 7 bits (128 samples). It takes less space in the FPGA to set up accumulators in powers of 2 then arbitrary numbers of samples. There are details here: http://wpilib.screenstepslive.com/s/...-analog-inputs (geared more towards C++ and Java, but still apply).

Re: CRIO 9201 Analog Sampling Rate & Averaging
 

Awesome information. Exactly what I was looking for. I'm surprised I hadn't read that already, as I'm one of the few that actual reads the documentation.

Thanks Joe, you made my day.