Re: Speed Controller Design
 

The Jag's output PWM frequency is 15,000 Hz. The Victor's is 150 Hz.

Re: Speed Controller Design
 

That only makes too much sense, thanks. Where would you possibly draw the line for what works with locked antiphase?

Re: Speed Controller Design
 

Since you're in control of the design, you might try designing it so that it can work with a variety of chop rates and different output methods and see if you can answer the questions in the following thread: http://www.chiefdelphi.com/forums/sh...ad.php?t=77297 and this thread: http://www.chiefdelphi.com/forums/sh...ad.php?t=83973

Re: Speed Controller Design
 

Black jags switch different than tan jags. The tan jags are high side switchers. The black jags are locked antiphase. Allegro makes a nice fet full bridge automotive driver chip. The A3941K. The data sheet gives a good description of the different ways the Fet bridge can be driven. May be it will help.
http://www.allegromicro.com/en/Produ.../3941/3941.pdf
Warning to understand this chip requires allot of back ground Knowledge but the diagrams and tables help with the fundamentals. This chip is used on some of Pololu Robotics motor controllers. http://www.pololu.com/
The Jags really are a deal for FIRST teams compared to many other less capable drivers.

Re: Speed Controller Design
 

Well that's certainly useful to be aware of. Maybe black Jags shipped to FRC teams should come wrapped in yellow caution tape with a warning to this effect.

Re: Speed Controller Design
 

Actually, I find that A3941K chip very intriguing... I might end up using it in the future, because it provides a lot of nice features.


Why is it that they use multiple MOSFETs per H-Bridge leg? Is it to provide more current?

If so, could I use such a configuration on another Gate Driver, such as the A3941K?

Re: Speed Controller Design
 

OK,
Time for a little better definition here. The Jaguar and the Victor differ a little in the method of motor control but not much. The H bridge is basically the same for both, four sets of FETs. To drive in one direction a FET must be connected to the high side and another to the low side. In your drawing above, the diagonally connected FETs are turned on for this mode. Q1 and Q4 for one direction and Q2 and Q3 for the other direction. (Observe current flow through the motor when visualizing these modes.)

Where the Jaguar and Victor differ is that in the Victor, both FETs in the pair are controlled by PWM signals while in the Jaguar, only the high side FET is PWM while the low side FET is ON for direction.

The Brake Mode jumper operates in a similar manner for both types. The Brake Mode will turn on both low side FET pairs in a zero throttle condition while the Coast mode will turn off all FETs. Note that during Brake Mode, current supplied by the motor is shunted through one pair, the common power supply lead and then through the other pair. During Coast, no current flows.

The locked anti-phase that Eric refers to is a condition where the controller is supplying a 50% duty cycle of forward and reverse commands essentially locking the motor shaft in position under power. Please note that this could be a relatively large current demand as current is flowing in the motor all the time. Gary, correct me if I am wrong, but I was under the impression that both the Tan and Black Jaguars could only provide lock mode (analog control mode) under CAN control with encoder input provided at the controller or through the buss. The difference between the two is essentially the RS232 input and the change in the FETs to provide 24 volt input on the Black.

Re: Speed Controller Design
 

locked anti-phase does provide some damping (resistance to sudden changes in speed), but it doesn't "lock the motor shaft in position". If there is a load on the motor, the motor will not stay locked in position.

Re: Speed Controller Design
 

A brief technical sidetrack - for an interesting demonstration of "brake" versus "coast", take the two leads for the motor and short them together. Now try spinning the motor shaft. Now you'll understand why turning on either both of the low side or both of the high side drivers result in "brake".

After you've shown yourself and others how to "brake" a DC brush motor, now try to explain why this happens. This is a great introductory lesson to electromagnetism.

Russ

Re: Speed Controller Design
 

Yes, I use this demonstration. It is very effective and gets students thinking. Especially when trying to explain the difference between dynamic and static braking.

Re: Speed Controller Design
 

like when doing closed-loop position control on a lightly-loaded motor, for example.

Re: Speed Controller Design
 

Ether,
Yes, you are correct. We have used this method in the past. With closed loop control using CIM motors and the FRC battery, it is essentially locked.

Re: Speed Controller Design
 

Okay I'm sorry if I'm being difficult here, but it seems that the way the circuit is laid out, it wouldn't be possible for a Jaguar to control the high and low side FETs separately, because of the gate driver they use (which makes the high side and low side always opposite each other, unless they are disabled).

Maybe I'm missing a big piece to this puzzle.

Also, would using multiple FETs per leg of the H-Bridge just increase the gate capacitance, meaning you can use as many as the driver can handle effectively (if that makes any sense)? And I would assume using more FETs per leg of the H-Bridge would provide higher current capacity...


By the way, thank you all for being so helpful! I've gone 0-60 (or maybe 35...) on this topic over the past two days!

Re: Speed Controller Design
 

Geek,
I know it is hard to see but one FET driver only controls one of the pair. The other FET is controlled by the second FET driver. Note where the motor is connected in the schematic you referenced. (Don't look at the driver sheet, you have to look at the jaguar schematic) In this way it is possible to get the control needed for speed control of the brushed CD motor.
In the original design, the FETs used could handle about 40 amps each for short durations due to the internal heating of the FET. With three in parallel, the current capabilities almost met the stall current on a CIM (129Amps). In addition, the original design had a Fairchild driver circuit that in addition to being discontinued by Fairchild also had been designed for 7 amps of gate current. For the most part, the series resistance of most robot designs limited current so that stall on the CIM was less than 120 amps. For some teams that choose #10 or larger wire and short runs could cause significant currents to flow through the Jaguar. There is also a small resistor in the Jaguar that is used for current sense. The voltage across this resistor feeds into the controller for over current protection and makes it also available on the CAN buss for feedback. It was the Fairchild part that seemed to be the cause of a large number of the failures experienced last year. The failure where a motor could only be controlled in one direction was the failure of one of the gate drivers.

Re: Speed Controller Design
 

Attached PDF shows a simplified view