Speed Controller Design
 

I've been looking at designs for speed controllers (mostly Jaguars, because I can get my hands on those schematics). Frankly, they're overpriced, and if I want to build my own robot (outside of FIRST), I'd much rather design my own (or at least make a hearty attempt).

Attached is the schematic to the Jaguar Speed Controller. The majority of the actual motor controlling portion of the design is on the 2nd page on the right. Basically, it's an H-Bridge, controlled by two MOSFET drivers (one for each side) and each leg of the H-Bridge is made up of 3 MOSFETs.

My issue is this: By looking at the design and not knowing what signals CTRLA, CTRLB, PWMA, and PWMB are (since they're coming out of the microcontroller, I don't know what they are unless I were to have the uncompiled firmware for the Jaguar), I can't see this thing working in theory. After carefully studying the datasheet for the MOSFET driver, I learned that if the signal coming into PWM is high, HDRV is high (opening the MOSFETs it controls) and LDRV is low (closing the MOSFETs it controls).

Knowing this, given the following situation (set up the same as a Jaguar, only simplified for understanding)


Assuming the PWM square waves are aligned, when the PWM signal is HIGH, both Q1 and Q2 are on, but since Q3 and Q4 are not, there is no current flow. Similarly, when the PWM signal is LOW, Q3 and Q4 are on and Q1 and Q2 are not, and there is still no current flow.

If the PWM square waves are inverse of each other (or any other alignment), when one is high and the other is low, current will flow (e.g. when the left side is high and the right is low, current will flow from Q1 to Q4). However, since the wave then inverts, it would then switch which MOSFETs are open, thus switching the motor direction, which doesn't sound like it would work out too well...



There is one other possibility still: What if they aren't putting a PWM input into the PWM pin, but rather the OD (Output Disable) and a HIGH or LOW into PWM, depending on motor direction?

OD pulls both HDRV and LDRV low (closing their MOSFETs) if it is low.



When PWM is HIGH on the left side, then Q1 is open and Q3 is closed. If it is LOW, Q1 is closed and Q3 is open. The same goes for the other side. Then the PWM into OD would close whichever is open when it is low. This would essentially create a magnified PWM power source, which is the goal of a speed controller.


The second setup works, but I'm skeptical to believe that is how it functions, because that is not the specified use for OD in the datasheet. However, it doesn't seem to work any other way. Anyone know what's going on for a fact, or have an oscilloscope and a Jaguar and is willing to test this out?

Re: Speed Controller Design
 

The Jaguar is "overpriced" for your application because it provides more features than you need (CAN feedback is a major one).

An iPad is an overpriced e-reader, yet it also provides many other functions.

(For what it's worth)

Re: Speed Controller Design
 

Yes I can agree with that, and I still respect the Jaguar a ton, I just feel like it's a bit much for most applications. A 50 MHz MCU is pretty powerful, especially for just driving a speed controller. But at this point I'm more concerned with getting what I need and nothing more. The one I'm "designing" (basically, I'm working off the Jag design) will be I2C controlled, because I prefer it. Also, I don't care about a casing, whereas the Jag has a pretty custom plastic injection molded case to go along with it.

Please don't see this thread as a criticism of the Jaguar, but more or less a query of its design.

Re: Speed Controller Design
 

I feel extremely comfortable with disagreeing with you on this point, but instead lets agree to ammend the statement with "for your purposes".

The firmware for the non FRC specific version is freely available for download on the RDK CD.

My laptop is broken, so I can't spend much CD time these days. I'd be happy to walk you through this when I get a replacement.

Re: Speed Controller Design
 

I understand what you're saying; there doesn't seem to be an input to chose between HDRV and LDRV. The reason is, they're both used together.
If you look at the datasheet for the PWM driver, it says the low is 180 degrees out of phase of the high. That means the "off" period for HDRV is the "on" period for LDRV. On the Jaguar (unlike the Victor) the H-bridge switches between 12v and 0v, not 12v and "open".

There are then two ways to stop the motor: brake (driving both sides at 50% duty cycle, or 6v) or coast (using the OD pin).

What's especially interesting about this is that you don't *need* to dedicate a microcontroller output to each side; you just swap the high and low on one side of the h-bridge, and you can use the same PWM signal to control both PWM drivers.

You are absolutely right that you could make a less expensive speed controller with less features. Something like that might actually be quite useful. Let me recommend that you use an aluminum heat sink instead of just a fan. A little thermal mass is useful in preventing accidents.

Re: Speed Controller Design
 

Okay I'm starting to get there... but still a bit confused.

If I were to want to run at half speed, so about 6V, I would think I should use a 50% duty cycle, but that runs the motor in forward 50% of the time and reverse 50% of the time, thus braking as you stated. The same holds true for any other speed; The time the PWM is low, the motor is doing the opposite of what I want. So, to run at half speed, would I do what I tried explaining and hold PWM high and then send a 50% duty cycle to OD? Or is there something I'm still missing?

Re: Speed Controller Design
 

To run at half speed forward, you have a 75% duty cycle. Backward at half-speed, you have a 25% duty cycle.

Re: Speed Controller Design
 

Okay, that makes sense. It just seems odd that it's running forward 75% of the time and backwards 25% of the time to go forward at 50%... wouldn't it make more sense to just go forward 50% of the time?

Re: Speed Controller Design
 

Marshal,

Have you confirmed the above experimentally?

Re: Speed Controller Design
 

No, I haven't.
Every Jaguar that I haven't fried I've kept together. However, it seems to be what makes sense.
I believe there is a thin conformal coating on the Jaguar, so I would not be able to probe the microcontroller directly. However, I can probe the Jaguar output if you like.

If you're asking about the PWM drivers, all the MOSFETs are identical (all N-channel), and so switching the high and low should work fine.

Re: Speed Controller Design
 

I have. It is referred to as "locked anti-phase", and is usually used when you need fine control while nearly off.

EDIT:
Locked anti-phase is only applicable with high chop frequencies. Locked anti-phase could work on a Jaguar, but not on a Victor.

Re: Speed Controller Design
 

Is this the default operation mode of the Jaguar ?

Re: Speed Controller Design
 

I'm pretty sure this is the only option on the Jaguar.
Even in coast mode, when I take a motor down from full speed to 10%, it goes down like it was braked. (It also draws a lot of current in doing so, tripping the crowbar on my 9A power supply, even if the motor is free-running. It performs fine on battery.)

Re: Speed Controller Design
 

Is this with open-loop (voltage) control, or with closed-loop speed control ?

Re: Speed Controller Design
 

Okay, for the sake of education (and that I've exhausted the extent of Wikipedia's ability to have a page on every minuscule topic) could someone please give a better definition of locked antiphase? I understand that it's using a PWM where a 50% duty cycle is brake, 100% is full forward, 75% half, 25% half reverse, etc. But maybe an illustration or something to that effect? I'm kinda swimming in all these terms...

Also high chop frequency. I have only a very slight idea of what that is, and how it affects Victors and Jaguars differently.

Thanks!

Re: Speed Controller Design
 

The Jag's output PWM frequency is 15,000 Hz. The Victor's is 150 Hz.

Re: Speed Controller Design
 

That only makes too much sense, thanks. Where would you possibly draw the line for what works with locked antiphase?

Re: Speed Controller Design
 

Since you're in control of the design, you might try designing it so that it can work with a variety of chop rates and different output methods and see if you can answer the questions in the following thread: http://www.chiefdelphi.com/forums/sh...ad.php?t=77297 and this thread: http://www.chiefdelphi.com/forums/sh...ad.php?t=83973

Re: Speed Controller Design
 

Black jags switch different than tan jags. The tan jags are high side switchers. The black jags are locked antiphase. Allegro makes a nice fet full bridge automotive driver chip. The A3941K. The data sheet gives a good description of the different ways the Fet bridge can be driven. May be it will help.
http://www.allegromicro.com/en/Produ.../3941/3941.pdf
Warning to understand this chip requires allot of back ground Knowledge but the diagrams and tables help with the fundamentals. This chip is used on some of Pololu Robotics motor controllers. http://www.pololu.com/
The Jags really are a deal for FIRST teams compared to many other less capable drivers.

Re: Speed Controller Design
 

Well that's certainly useful to be aware of. Maybe black Jags shipped to FRC teams should come wrapped in yellow caution tape with a warning to this effect.

Re: Speed Controller Design
 

Actually, I find that A3941K chip very intriguing... I might end up using it in the future, because it provides a lot of nice features.


Why is it that they use multiple MOSFETs per H-Bridge leg? Is it to provide more current?

If so, could I use such a configuration on another Gate Driver, such as the A3941K?

Re: Speed Controller Design
 

OK,
Time for a little better definition here. The Jaguar and the Victor differ a little in the method of motor control but not much. The H bridge is basically the same for both, four sets of FETs. To drive in one direction a FET must be connected to the high side and another to the low side. In your drawing above, the diagonally connected FETs are turned on for this mode. Q1 and Q4 for one direction and Q2 and Q3 for the other direction. (Observe current flow through the motor when visualizing these modes.)

Where the Jaguar and Victor differ is that in the Victor, both FETs in the pair are controlled by PWM signals while in the Jaguar, only the high side FET is PWM while the low side FET is ON for direction.

The Brake Mode jumper operates in a similar manner for both types. The Brake Mode will turn on both low side FET pairs in a zero throttle condition while the Coast mode will turn off all FETs. Note that during Brake Mode, current supplied by the motor is shunted through one pair, the common power supply lead and then through the other pair. During Coast, no current flows.

The locked anti-phase that Eric refers to is a condition where the controller is supplying a 50% duty cycle of forward and reverse commands essentially locking the motor shaft in position under power. Please note that this could be a relatively large current demand as current is flowing in the motor all the time. Gary, correct me if I am wrong, but I was under the impression that both the Tan and Black Jaguars could only provide lock mode (analog control mode) under CAN control with encoder input provided at the controller or through the buss. The difference between the two is essentially the RS232 input and the change in the FETs to provide 24 volt input on the Black.

Re: Speed Controller Design
 

locked anti-phase does provide some damping (resistance to sudden changes in speed), but it doesn't "lock the motor shaft in position". If there is a load on the motor, the motor will not stay locked in position.

Re: Speed Controller Design
 

A brief technical sidetrack - for an interesting demonstration of "brake" versus "coast", take the two leads for the motor and short them together. Now try spinning the motor shaft. Now you'll understand why turning on either both of the low side or both of the high side drivers result in "brake".

After you've shown yourself and others how to "brake" a DC brush motor, now try to explain why this happens. This is a great introductory lesson to electromagnetism.

Russ

Re: Speed Controller Design
 

Yes, I use this demonstration. It is very effective and gets students thinking. Especially when trying to explain the difference between dynamic and static braking.

Re: Speed Controller Design
 

like when doing closed-loop position control on a lightly-loaded motor, for example.

Re: Speed Controller Design
 

Ether,
Yes, you are correct. We have used this method in the past. With closed loop control using CIM motors and the FRC battery, it is essentially locked.

Re: Speed Controller Design
 

Okay I'm sorry if I'm being difficult here, but it seems that the way the circuit is laid out, it wouldn't be possible for a Jaguar to control the high and low side FETs separately, because of the gate driver they use (which makes the high side and low side always opposite each other, unless they are disabled).

Maybe I'm missing a big piece to this puzzle.

Also, would using multiple FETs per leg of the H-Bridge just increase the gate capacitance, meaning you can use as many as the driver can handle effectively (if that makes any sense)? And I would assume using more FETs per leg of the H-Bridge would provide higher current capacity...


By the way, thank you all for being so helpful! I've gone 0-60 (or maybe 35...) on this topic over the past two days!

Re: Speed Controller Design
 

Geek,
I know it is hard to see but one FET driver only controls one of the pair. The other FET is controlled by the second FET driver. Note where the motor is connected in the schematic you referenced. (Don't look at the driver sheet, you have to look at the jaguar schematic) In this way it is possible to get the control needed for speed control of the brushed CD motor.
In the original design, the FETs used could handle about 40 amps each for short durations due to the internal heating of the FET. With three in parallel, the current capabilities almost met the stall current on a CIM (129Amps). In addition, the original design had a Fairchild driver circuit that in addition to being discontinued by Fairchild also had been designed for 7 amps of gate current. For the most part, the series resistance of most robot designs limited current so that stall on the CIM was less than 120 amps. For some teams that choose #10 or larger wire and short runs could cause significant currents to flow through the Jaguar. There is also a small resistor in the Jaguar that is used for current sense. The voltage across this resistor feeds into the controller for over current protection and makes it also available on the CAN buss for feedback. It was the Fairchild part that seemed to be the cause of a large number of the failures experienced last year. The failure where a motor could only be controlled in one direction was the failure of one of the gate drivers.

Re: Speed Controller Design
 

Attached PDF shows a simplified view

Re: Speed Controller Design
 

I have a bunch of comments and questions. TIA to anyone who has the patience to read them all and shed some light :-)


Would this only be for the tan Jag, not the black? see quote (4)


In earlier posts, it was stated that for locked antiphase there would be a 50% fwd/rev duty cycle for a zero command. This would seem to preclude turning on both low-side FETs simultaneously unless there were special logic to override the locked antiphase for the zero-throttle condition. Perhaps you are referring to the tan Jags only?



The current in the motor under this condition should be very nearly zero. The current never has a chance to rise to appreciable levels since the voltage is changing directions so fast. The motor inductance is the key here.


"Black jags switch different than tan jags. The tan jags are high side switchers. The black jags are locked antiphase."

I'm not disputing what you said, but could you please provide a link to this information?

"Allegro makes a nice fet full bridge automotive driver chip. The A3941K. The data sheet gives a good description of the different ways the Fet bridge can be driven."

Are you saying that the Black Jags use the Allegro A3941K instead of the Fairchild FAN5109?


It would depend on the motor inductance. Very low motor inductance would require a higher switching frequency. Very high motor inductance would allow a lower switching frequency.


I think what you described in quote (10) below would be locked antiphase.



I believe EricVanWyck stated in post 11 that locked antiphase gives better fine speed control at low speeds. I'm not entirely sure why this is, perhaps Eric or someone else could elaborate.



Could you clarify what you meant by this? And how does it apply to locked antiphase, and coast mode?


Is the FAN5109 used only in the tan Jag, or in the black as well?


Is this how the black Jag does locked antiphase, or does it use the Allegro driver?


Does the Jag firmware ever drive the FAN5109 this way?


Is this the schematic for the Black Jag, or the Tan Jag, or both ?

Re: Speed Controller Design
 

Yeah, I kind of noticed that this thread has a lot of contradictory information, so clarification like this is nice. I'll try and clarify on what I said.

I wouldn't be able to tell you, because there is no schematic posted for the tan Jags.

As far as I understand, that's how the tan Jag does locked antiphase.

I don't have the Jag firmware. Anyone have it?

Tan Jaguar, because like I said earlier, the Black Jaguar doesn't have a posted schematic.


Maybe we should make a white paper on this subject, for clarity.

Re: Speed Controller Design
 

Both versions of the Jaguar are sold as Reference Design Kits - all of their information can be found online. Every last detail can be found, provided you are willing to digg.

http://www.luminarymicro.com/products/rdk_bdc.html
http://www.luminarymicro.com/products/rdk-bdc24.html

Re: Speed Controller Design
 

I am willing to dig, I was just digging in the wrong places :-)

Thanks for the links.

Re: Speed Controller Design
 

Yeah, thanks! I couldn't find the Black Jaguar info for the life of me!

This might provide a spec of clarification

Re: Speed Controller Design
 

I see the Black Jag uses the A4940 to drive the FETs.

http://www.allegromicro.com/en/Produ.../4940/4940.pdf

I'm still wondering if the tan jag drives the FAN5109's in non-locked-antiphase the way Geek 2.0 described in the original post. It sure looks that way, with the PWMA & PWMB going to the Output Disable in the FAN5109. I haven't checked to see if the firmware source code is in the info I downloaded, and even if it is, not sure I could decipher it.

Re: Speed Controller Design
 

I was just going to comment on the Allegro driver in the black Jaguars. If I do end up designing my "own" speed controller, I'll probably end up using an Allegro driver.

Note also that the main difference between the A4940 (in the black jaguar) and the A3941 (described earlier) is that the A3941 has a 5V regulated output on it, whereas the A4940 does not.

Re: Speed Controller Design
 

Ether,
The switching of the FETs was explained to me by a member of the Luminary team at the end of 2009. I have no documentation that either of the Jags are locked anti-phase devices in normal control although it is my understanding that all controllers are capable of this action. There is no mention of locked anti-phase in either of the manuals for Jags. The brake mode on both Jags is described in the literature as acting the same, a simple dynamic short across the motor with both low side FETs turned ON. In the description for both Jags, there is a caveat that while this mode does provide braking at zero speed it should not be considered a hard brake that prevents movement.
While there is minimal current if the duty cycle is low in locked anti-phase, a condition where the duty cycle is 50% (common use), even in the Jag the current has a chance to rise to near full level due to the inductance of the motor.
As I said in an earlier post, the Fairchild device is reportedly out of production. This had a lot to do with the change in FET drivers in addition to the decision to move to 24 volts.

Geek,
PWM signals are used in two ways in the speed controllers. The input PWM for hobby interface is a defined standard that is used to send control signals to servos and speed controllers for both direction and speed. The output of the speed controllers is also PWM but in no way is it similar to the input signal. For the motor side, 50% duty cycle means the motor is supplied current for 50% of the time. That is, a 3.3mSec pulse for the Victor or a 33 microSec pulse for the Jags. For direction the output current actually changes polarity.

For all,
It is my understanding that both Jags leave the low side FETs ON during all throttle conditions except zero (subject to which direction pair is selected) and during locked anti-phase (where the direction is changing at a 50% duty cycle rate). I think it has to do with the need for charging of the gate drive bootstrap capacitor. The Victor designers chose to open both FETs during the OFF period. In early designs of the Victor, the switching frequency was 2kHz. Engineers at IFI chose to move to 150Hz to give maximum low throttle torque for the motors we were using at the time. 150Hz is less affected by the inductance of the motors. It does however, give the impression that low speed linearity suffers and it does cause some acoustic output for the motors it is controlling. 15kHz switching does interact with the inductance of the motors and is sufficiently high to cause no discernible acoustic noise except in the smaller motors.

Re: Speed Controller Design
 

Would this affect the choice of speed controller for a robotic subsystem? For example, would fine PID control on a shoulder joint that needs more low-throttle torque be more efficient with a Victor over a Jag? Or is the difference (mostly) negligible?

Re: Speed Controller Design
 

Jesse,
There are pros and cons for both types. In the application you describe, I believe either type will work, but the PID variables will be vastly different between the two types. Whatever non-linearity might be present is capable of being corrected in software. Please be advised that many people have reported that window motors don't play well with Jaguars. I have nothing more at this point in the discussion than that there appears to be a interaction with both the locking pawls internal to the window motors and some interaction with the armature/worm gear interface when using the Jaguars. Some teams reported no problems with this combination. I am still looking for input from teams who have been doing off season testing.

Re: Speed Controller Design
 

In locked anti-phase, when the output duty cycle is low you have HIGH motor current.

When the output duty cycle is 50% you have nearly zero motor current, due to the inductance of the motor.


... except when the output is locked antiphase, in which case 50% output duty cycle means the motor is supplied a positive voltage drop 50% of the time and a negative voltage drop the other 50%, resulting in near-zero motor current (due to the inductance of the motor)

Re: Speed Controller Design
 

Ether,
When the locked anti-phase duty cycle is 50% current is flowing 100% of the time. 50% in one direction, 50% in the other, correct? An averaging meter will read this as zero while a true reading RMS will not.
During a previous discussion (2009) someone measured a CIM motor at .12 mH and 90 mOhm. At 150Hz this is very low but at 15kHz it is significant.

Re: Speed Controller Design
 

No. In any event, if your particular application has a unique need for higher torque gain at low throttle, that is easily done in software.

Re: Speed Controller Design
 

When the locked anti-phase duty cycle is 50%, voltage drop across the motor is positive 50% of the time and negative 50% of the time. Under these conditions, the motor inductance prevents any significant motor current from developing.

Both average and true RMS will be near-zero. At 15000Hz switching frequency and 50% duty cycle, the voltage drop will stay at each polarity only 33 microseconds. This is short compared to the rise time for the current (due to the motor inductance). Thus even the peak current never amounts to much. So the RMS is also near-zero.

The significant inductance of the CIM at 15KHz (Jaguar) is what suppresses the current at 50% motor duty cycle in locked antiphase.

Re: Speed Controller Design
 

Ether,
I have realized we were talking about two different concepts. My mistake. I was talking about locked rotor motor control by driving the motor anti-phase signals to hold the output shaft in place. In this method, current is high through the motor.
I am guessing you are talking about the HBridge control. Your statements are correct. It appears that the Jags can produce this kind of control through the CAN interface only. The current Victor controllers cannot. Both controllers produce zero volts across the motor at zero throttle.

Re: Speed Controller Design
 

Like ether said, it should be handled in software. However, if you have the opposite requirement, you need fine control at low throttle, the Jaguar is much better. See http://www.youtube.com/watch?v=_X0_aFMpm9I for a visual demonstration.

Re: Speed Controller Design
 

I saw this about a year ago. It's hard to tell for sure, but it doesn't look like there is any kind of sensor on either motor shaft to provide speed feedback. So I am assuming that this demo was done done with open-loop (voltage) control of speed ?

I wonder how the Vic and Jag would compare when using closed-loop control, and with the motor under at least some minimal load instead of free-running. Could be an entirely different story.

Re: Speed Controller Design
 

Anecdotal, but 330 has mentioned that their 2008 Arm performed better when under control by jaguars.

Re: Speed Controller Design
 

You are correct that video was unloaded with voltage control. Adam is correct that the difference was noticeable with our arm, perhaps even more so when loaded.

While we have never run our arm with velocity control, it was also noticeable with position control. It was much easier to get an over-damped response with the jaguar. Our drivers preferred it to be over-damped, they didn't like an extra oscillation even if it was faster. Because of the slop in our arm, being over-damped also gave a more accurate response, since we were always approaching from the same direction. It was also much faster to tune the PID to an acceptable response with the jaguar. Perhaps given the time for optimal tuning for both you might be able to get similar responses, but I don't think many teams have that much time in a FIRST season.

At some point, it would be interesting to repeat the same tests with a black jaguar, but I'm not sure we'd be able to do it. I do encourage other teams to perform similar tests and document the results.

Re: Speed Controller Design
 

Thanks for the detail Joe. That helps put things in perspective.

Re: Speed Controller Design
 

Ether,
My comment about the motor slowing down quickly when the speed is reduced was in reference to open-loop Voltage control.

I've opened up both Black and Tan Jaguars. (I've fried both). I noticed that the Black Jaguars don't have all 12 MOSFETs; they only have 8. I know the purpose of this was to allow room for the RS232 components, but I was wondering how this was possible (and still have the same performance)? Are they higher-quality MOSFETs with lower ON resistance or greater power dissipation?
If we take Ohm's law, we can say that the total power dissipated by a set of MOSFETs (for one leg of an H-bridge) is i*i*r/n.
i is current
n is the number of MOSFETs
r is the ON resistance of a single MOSFET

That means the power dissipatiion per MOSFET is (i*i*r/n)/n
OR r*(i/n)^2

If identical MOSFETs were used, that means the MOSFETs in the Black Jaguar dissipate 9/4 of what the ones in the Tan Jaguar do, given identical operating conditions. A more accurate way of saying that is if you took out one MOSFET from each leg of the H-bridge on a Tan Jaguar, each MOSFET would now dissipate 9/4 as much power as it did before. (If it doesn't, then it burns up)

However, it has been stated that the Tan Jaguars operate differently than the Black Jaguars. Does locked anti-phase reduce the current through the MOSFETs?

Re: Speed Controller Design
 

Tan Jag uses FDP8874

Black Jag uses FDP8441

Re: Speed Controller Design
 

OK, I can understand why a Black Jag would exhibit this behavior. Damping is an inherent characteristic of locked antiphase switching.

But what I can't make sense of (yet) is this:

Why would it draw a lot of current when you take the motor down from full speed to 10%, if you are using open-loop voltage control?

Re: Speed Controller Design
 

The reason it draws a lot of current is that instead of shorting the motor to itself, you're shorting the motor to the power supply.
I haven't actually measured the current while it's doing this. It might have something to do with the nature crowbar on the power supply. (Perhaps it's voltage controlled, not current-controlled?)

I will double-check this behavior.

Re: Speed Controller Design
 

Thanks for looking those up!
The FDP8441, the on-resistance is 0.0021 ohms and it has a power dissipation of 300W.
The FDP8874 has an on-resistance of 0.0036 ohms and a power dissipation of 110 watts.

So yes, they did use much higher quality transistors.

Re: Speed Controller Design
 

Never mind - I figured it out.

When a DC motor is free-spinning at high speed there is very little current. If you then apply a reverse voltage, the motor's back EMF adds to the applied reverse voltage and creates high current.

Re: Speed Controller Design
 

Okay, good.
I confirmed that it happens, but it only happens with Black Jaguars. On Tan Jaguars, the motor just runs down on its own.

Re: Speed Controller Design
 

That's because the Black Jags use locked antiphase switching (which applies reverse voltage during the "off" part of the duty cycle).

So, in your example, if you change the throttle command from 100% to 10%, that corresponds to a change in duty cycle from 100% to 55%. With a 55% duty cycle, you will have 45% reverse voltage with locked antiphase.