My best guess at what is happening is that "Makefile" is a default target of sorts, and it gets matched by the wildcards. For some reason, I don't have any problems on my machine. Maybe it's because I have a WindRiver makefile so the "Makefile" target is skipped instead of giving an error.
I think I've finally figured out how to fix it:
Code:
#UCPP makefile
# Default target
all: force
cd PPC603gnu && exec $(MAKE) -f Makefile_linux
# Don't do anything for the "Makefile" target
Makefile: ;
%: force
cd PPC603gnu && exec $(MAKE) -f Makefile_linux "$*"
force: ;