Thread: FRC FPGA usage
View Single Post
  #11   Spotlight this post!  
Unread 04-10-2011, 16:43
jhersh jhersh is offline
National Instruments
AKA: Joe Hershberger
FRC #2468 (Appreciate)
Team Role: Mentor
 
Join Date: May 2008
Rookie Year: 1997
Location: Austin, TX
Posts: 1,006
jhersh has a reputation beyond reputejhersh has a reputation beyond reputejhersh has a reputation beyond reputejhersh has a reputation beyond reputejhersh has a reputation beyond reputejhersh has a reputation beyond reputejhersh has a reputation beyond reputejhersh has a reputation beyond reputejhersh has a reputation beyond reputejhersh has a reputation beyond reputejhersh has a reputation beyond repute
Re: FRC FPGA usage

Quote:
Originally Posted by Al Skierkiewicz View Post
Joe,
Can you go into a little more depth on the safety issues with the FPGA? These are the used for field controls during a match, correct? Thanks.
The FPGA has a hardware watchdog timer that will stop all PWM, Relay, and Solenoid signals in the event that the RT processor does not indicate that the FMS is still allowing the robot to run. By keeping the FPGA inaccessible to teams, we can ensure that this functionality is not compromised and hence the robot is fail-safe.

-Joe
Reply With Quote