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Unread 22-01-2012, 15:19
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Re: inverse sine FPGA

Quote:
Originally Posted by Betty Boop View Post
I’m implementing inverse sine inside the FPGA VI. To do that, I use lookup table/LUT. I found the attached VI. I’m just wondering if there’s a way that I could be the one to set the input values in the LUT? In the attached VI, the input value is between 0-1023 which is the ‘address’. Is there a way that I could customize LUT for the input value (i.e. input values could be: -1, 0.8, 0.6.... not necessarily the address which is 0,1,...1023)? It’s because I’m having a hard time utilizing the attached VI in mapping the input and output to their true values (i.e. -1 to 1 for input, -pi/2 to pi/2 for output). Thank you very much for your time!
http://www.chiefdelphi.com/forums/sh...72#post1111272

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