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Re: Maximum digital interrupt rate
Quote:
Originally Posted by Alan Anderson
Interrupts don't enter into it. The FPGA can keep up with digital inputs that change more than 30,000 times a second. Even if you had signals that were too fast for it, it wouldn't cause any control lag. It would just produce inaccurate measurements.
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I don't have the link handy but Ether referred me to a white paper that says the max count rate (by the FPGA) is around 44k/s. So the lag is not because of the 30K count rate unless he is using k2X or k4X for the mode. If so, switch to k1X.
HTH
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