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Unread 28-12-2012, 00:10
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Re: Dealing with low resolution data for speed PID

Quote:
Originally Posted by Jared341 View Post
I have found that the most common source of this problem with encoders is that the A and B lines are not exactly 90 degrees out of phase and I am trying to measure the time between two consecutive transitions in "x4" mode (rising A -> falling B for example). I have had good luck with measuring successive transitions in "x1" mode (rising A -> rising A)...
Yes, the cross-channel tolerance seems to be larger than the same-channel tolerance.

Quote:
Worst case you can average the last N measurements and be able to trade off phase delay with smoothness.
It would be nice if the FPGA would do this for you, and allow you to specify a FIR boxcar average of the last N pulses. Or if that's too much to ask, perhaps a simple low-pass IIR filter.

Otherwise, you're stuck with grabbing N samples each 20ms (or whatever) apart.