Quote:
Originally Posted by Mr. Lim
Code:
public double getPeriod() {
double period;
if (m_counter.readTimerOutput_Stalled()) {
return Double.POSITIVE_INFINITY;
} else {
period = (double) m_counter.readTimerOutput_Period() / (double) m_counter.readTimerOutput_Count();
}
return period / 1.0e6;
}
Something isn't jiving here. In the above code, why would you take the period and divide by the count? If the FPGA is measuring the period directly, should we just be taking the period directly? Will count ever be anything other than 1?
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The variables are not terribly verbose... the "count" is the number of samples in the sliding window average. Count will always be 1 if you specify not to average (NumberOfSamplesToAverage = 1).
The FPGA does not like to divide without using up a bunch of gates, where and the RT CPU with an FPU has no problem doing this. This is an optimization where all the addition and synchronization is done in hardware where it needs to be done, but the divide operation to get the actual average period is pushed to the driver.
If you want "Method 1", you have to do it the way Ken Streeter described. If you want "Method 2", you must use the FPGA.
Cheers,
-Joe