Thread: Best way to measure period between pulses? Counters and FPGA
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Unread 28-01-2013, 17:58
jhersh jhersh is offline
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Re: Best way to measure period between pulses? Counters and FPGA
Quote:
Originally Posted by Mr. Lim View Post
We had a Counter set up exactly as you describe above. The periods we were getting had a very pronounced stepwise response. As a result, our RPM readings changed in increments of about 375 RPM.
There is a finite resolution on the timing of the pulses. That period is 6.525 us per edge. In your system, does that correspond to 375 RPM? You may want to turn on averaging to improve the resolution (but increase the latency).

Quote:
Originally Posted by Mr. Lim View Post
We did the math, and these increments corresponded with 1 count / 20ms, which led us to believe the reads were still being done via method 1.
Sounds like a coincidence, maybe? Where are you getting 20ms as the refresh period? Just because that's the Driver Station's packet rate?

Quote:
Originally Posted by Mr. Lim View Post
Is it possible that the other modes (other than semi-period) use the FPGA to count pulses over a 20ms period instead of measuring the time between pulses directly?
No. The FPGA only implements method 2.