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Originally Posted by Ether
1 microsecond timer for time-stamping events (like the detection of rising and/or falling edges).
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153257 Hz (6.515 microsecond) polling frequency. The FPGA polls all the DIO inputs synchronously at this frequency.
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WPILib default for this type of counter is to use the 2 most recent counts to compute the period.
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Ether, thank you for this info -- this information would be very useful for deciding whether to use this rate determination functionality or numerical differentiation in calculating an encoder's speed (in terms of "lag" and noise for any given sensor and rpm)