Quote:
Originally Posted by Jaxom
Could you share which CRio feature this is?
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Here is the response from my programming mentor Joe H:
The implementation in San Antonio (Alamo) was using the cRIO's FPGA and RT processor to implement the Bling.
The FPGA was responsible for reading back buffers of timed audio data
using DMA from the analog input channel that had a microphone
connected.
The RT processor then performed DSP on the audio to identify the power of the Bass portion of the signal (128 Hz - 32 Hz). It also used some sinusoids to slowly sweep between target colors.
Once the color was chosen for that time, the FPGA was told to change
the 3 (red, green, and blue) DIO PWM signals that were driving the 3
channels of the LED panels. The FPGA continues to generate this duty
cycle until the next color is chosen by RT.
The digital outputs have FET buffers on them to allow the PWM signal
to control the relatively high current LEDs.
Hope this helps,
-Joe