Quote:
Originally Posted by Greg McKaskle
There are probably others. I feel that the next step is to characterize the improvement that Joe has already implemented. I'm sure that will be accomplished in the beta. Probably quite soon.
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Agreed. That is the next step. Thanks for the thorough description of what is going on. I really appreciate it.
Thanks Joe for describing the signal path to the FPGA, and working on improving the response time.
Hopefully we are all just getting worked up over nothing.