Here is my justification for assuming the MXP pins are redundant. Maybe I should use a better explanation instead of the word redundant.
How many ways are there to access I2C SDA? We can use the MXP pin 34 and the outer area of the RoboRIO connector labeled I2C SDA. Are these the traces the same? Are there really two independent I2C interfaces?
Where is the signal DIO0-9 accessed? MXP contains DIO0-9. There are also DIO0-9 on the outer edge of the RoboRIO. Are there two separate DIO0 signals? A and B ?
Greg mentioned that these are different buses. Does that mean the processor/FPGA can really control two I2C interfaces at the same time? I am not sure what he means by different buses. I thought two separate buses means that the FPGA controls the I2C-A and I2C-B independently.
Maybe some pins are redundant (

) and some are extra.
Sorry for the confusion.
Thanks