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Unread 24-10-2014, 07:03
Greg McKaskle Greg McKaskle is offline
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Re: Coustom Quadrature Encoder VI

Before you set out to write your own encoder library, why not take a look at the source code to the WPILib one first?

If you drop the Encoder Get, you will find code implementing the math pretty much the way you described. If you go a level deeper into the read of the encoder counts or the times, you'll see some purple nodes that are register reads from the FPGA into the the CPU.

So the FPGA's job is to compare edges on the digital lines and increment or decrement accumulators. It records the direction and time of the last edge. The FPGA doesn't do the final math since that involves floating point and doesn't need to happen at the same rate as the comparisons.

On the roboRIO, the digital will not be limited by the module that was in the cRIO, and the digital portion of the FPGA will run much faster. The math to scale, filter, and make the counts meaningful will still happen on the CPU.

So, please look through the VI and see if the math makes sense to you. Btw, the FPGA is clocked at 40MHz, so that may help decode some contestants in the code.

Greg McKaskle
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