Quote:
Originally Posted by AustinSchuh
This is on my over-booked TODO list...
We had a co-processor reading it last year. We are putting together a board right now to interface one with the roboRIO. We'll be releasing our beta test code closer to the start of the season. I expect that we should be able to interface with it over SPI.
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Austin,
Do you expect any differences between integrating on your co-processor and integrating with the accumulator in the FPGA, in particular with integral error and drift? What was the SPI bus clock speed/integral dt on your co-processor? Do you happen to know the SPI frequency on the roboRIO? (I think I saw 4MHz in a myRIO document...)
Thanks,
Aren