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Unread 13-03-2015, 10:20
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Re: paper: Driver Station Encoder Support using the TI LaunchPad

Quote:
Originally Posted by KMBruggeman View Post
So, one more question. (it's essentially my rookie year so I get unlimited questions right?) How would I run multiple interrupts or Port 1 would I just change different BITs (vs BIT 4 and 5 as shown in your example)?
There are a few different options, and they revolve around whatever software implementation you prefer. Not knowing much about your application, I'd recommend modifying the "new" Port 1 Interrupt Service Routine (ISR) that is shown in the paper rather than adding a new one for Port 2.

Let's assume that the second encoder will use hardware P1.2 (meaning Port 1, bit 2) for Phase A and P1.3 for Phase B and that the first encoder still uses P1.4 for Phase A and P1.5 for Phase B. The Interrupt Enable register acts in a "logical OR" fashion; if we want the Port 1 Interrupt to occur on the rising edge of P1.2 (encoder #2) OR P1.4 (encoder #1) then we would write P1IE |= (BIT2 + BIT4). We should also make sure that we have already written P1IES &=~(BIT2 + BIT4) to ensure that both are in "rising edge" mode. I think that syntax is valid, but even if it's not you get the idea.

The ISR itself gets a little more complicated since we now have to figure out *why* it got called: was it P1.2 or was it P1.4? The most straightforward (but not the only) way to do that is to check the status of the Port 1 Interrupt Flag Register (P1IFG) so see which bit is set; if Bit 4 is set then we know it was the first encoder that got us there; else it had to have been the second encoder. Once that's determined, then the only remaining task would be to look at the corresponding Phase B input for that encoder and increment/decrement it's associated counter (you'll need two now, after all) accordingly. You'll also need to move the P1IV=0 statement to the end of the ISR otherwise you'll never be able to figure out which flag was originally set.

Caution: There is a bit of a "gotcha" when working with the Interrupt Flags. As soon as you read the Interrupt Flag register in any way, the highest priority *pending* interrupt flag bit will automatically be cleared. In this situation, P1.2 is a higher priority than P1.4; for that reason, it's most intuitive to check P1.2 first. Actually, you may find it easiest to preserve a copy the P1IFG register and work from that instead. That way you don't care if the P1IFG register is changing.

A lot of this info is buried in the MSP430F5529 User's Guide, which is a mind-boggling 1,145 pages long. The relevant stuff for this discussion begins on p405. That being said, if you really want to learn about the MSP430 family that is the document to go to. It's a great little microcontroller but doesn't seem to get the love that the Atmel products do. If you really get into a bind with this we can help, but it probably won't be until after Week 5 since we're currently up to our proverbial armpits in robot design changes. Good luck!
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Last edited by ayeckley : 13-03-2015 at 10:26. Reason: Added detail.
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