[Joe Ross]

One of the senior design teams at RIT is using something a generation or so behind this. It is a CPU built into an FPGA, and the peripherals can be reconfigured at design time. If you want 8 serial ports, you can have it, or if you want those as 8 bits in a parallel port, you can have it. Once the CPU is configured, appropriate header files are generated to let you easily access your custom peripherals.