Hey all, thanks for the help
I've got just about everything implemented on the basic API level- serial I/O, transmitting and receiving command packets (including EEPROM read/writes and the repeat and replicate commands), and Intel HEX reading.
Soooo what I am probably going to do is use that code as a shared library (how does libfrcloader.so sound?
) and make a terminal-based loader first (to test) and if that goes over well, a GTK+ version. A shared or static library would be good if someone wants to write an ncurses or plain X version or something... I dunno.
Phil, you mentioned in your ifi-reloaded thread that you had the white paper for the IFI modifications to the AN851 bootloader. Do you still have it? I noticed in your code that you never actually use ifi_prep(), did that ever affect program loading? I
think I've got at least part of what the weird packets being sent mean.
"erase1" = STX STX 0x09 0xE0 0x00 0x08 0x00 0x00 DLE 0x0F ETX
"erase2" = STX STX 0x09 0xE0 0x00 0x40 0x00 0x00 0xD7 ETX
Taking out the control characters, it looks like it could be this:
Command 0x09
Rows 0xE0
Address 0x000800 (and 0x004000)
Data 0x00
and then the usual checksum.
I think command 0x09 is basically just a mass row write to whatever byte data is (in this case, 0x00). Since one row is 8 blocks or 64 bytes, I guess it's writing E0 rows of 0x00 (0x3800 bytes) to 0x0800 (Which accounts for the range 0x0800 - 0x4000) and the same amount to 0x4000 (0x4000-0x7800). From the looks of it, it's just doing a bulk erase to the upper limit of a device's program memory (3FFF is the limit on the PIC18F442, 7FFF on the 18F8520, etc.) in parts since it can only write/erase 256 rows at one time. Seems kind of redundant to me (why not use the regular row erase command?). Also, I think the second E0 should be FF (write from 0x4000-0x8000), I'll check that once I actually get a controller to test it on.
Wow, that was way more than I thought I was going to type. Sorry!
