TX2IE
According to the datasheet, TX2IE is the fourth bit of Peripheral Interrupt Enable register 3 (PIE3). this bit is used as an enable bit for a USART on the PIC.
If it is set to 1, the bit is set and the interrupt is active. if it is set to 0, it is not active.
Quote:
TX2IE: EUSART2 Transmit Interrupt Enable bit
1 = Enabled
0 = Disabled
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In plain English, when TX2IE is enabled, interrupts on the bit TX2IF are generated whenever the transmit buffer is empty.
RCIF
Likewise, RC1IF is bit 5 of the Peripheral Interrupt Request register 1 (PIR1).
this bit is used as a receive interrupt flag bit for a USART
Quote:
RC1IF: EUSART1 Receive Interrupt Flag bit
1 = The EUSART1 receive buffer, RCREG1, is full (cleared when RCREG1 is read)
0 = The EUSART1 receive buffer is empty
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So, when RC1IE is enabled, interrupts on RC1IF are generated whenever the receive buffer is full.