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Unread 05-04-2007, 09:47
Mike Bortfeldt Mike Bortfeldt is offline
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Re: VICTOR RESPONSE DELAY? - AGAIN

This thread got me wondering what the exact delay is for generating PWMs 1-12. Last year, based on some crude testing, I noticed that there seemed to be about a 50 millisecond delay between setting a PWM value and seeing a response (as Greg references in his first post). This observation came from monitoring the dashboard data and was therefore, not very accurate. Yesterday, I did some additional testing and here are the results.

- PWMs 1-12 are generated by the master processor in groups of 3 (1-3, 4-6, 7-9, 10-12). Within each group the pulses are generated simultaneously with only the pulse width varying. Each group follows the start of the previous group by approximately 2 milliseconds. Therefore the previous group pulses are completed (no matter what the pulse width) before the next group is started. This ensures a constant frequency independent of the pulse width of previous groups.

- The delay between setting the PWM variable and seeing the start of the pulse on the output pin can be up to the following:
Group 1 (PWMs 1-3) - 43 milliseconds
Group 2 (PWMs 4-6) - 45 milliseconds
Group 3 (PWMs 7-9) - 47 milliseconds
Group 4 (PWMs 10-12) - 49 milliseconds

- The minimum delay before the Victor can respond will be at least 1 millisecond and up to 2 milliseconds more depending on the pulse width. The Victor output frequency and mechanical delays will increase the time before you see a response as well.

- The delay is dependant on when the PWM variable is set in the code. The delays shown above are based on setting the PWM variable at the start of the routine "Process_Data_From_Master_uP" (and are therefore maximum values). If your user code takes 10 milliseconds to execute and you set a PWM value at the end of this time, then the delay before the "new" pulse is generated will be 10 milliseconds less. From what I can see, executing the routine PUTDATA does not immediately send the updated data to the master processor. This only occurs once every 26 milliseconds, probably at nearly the same time that new OI data is being received. Either that, or the Master processor doesn't act on the new data until the end of the 26 millisecond period.

Test Setup - The entire test was performed using only the RC. The PWM output to be tested was connected to Digital Input #3 (interrupt enabled). Each pulse width was timed to an accuracy of 1/4 millisecond. The PWM to be tested was normally set at "254" (2 milliseconds). Roughly once a second (every 40 calls to Process_Data_From_Master_uP) the PWM was changed to a value of "0" and the elapsed time between setting the PWM and observing the first 1 millisecond pulse (actually 1.25 milliseconds or less) was timed to an accuracy of 1/4 millisecond. Once the pulse was seen, the PWM value was reset to 254 in preparation for the next test, 1 second later. Data was very consistent. (OI & RC were tethered)

A second test was performed by delaying the setting of the PWM to "0" from the start of the Process_Data_From_Master_uP by putting in a 10 millisecond delay at the beginning of the routine. This resulted in delay values exactly 10 milliseconds less than the first test.

Mike

Last edited by Mike Bortfeldt : 05-04-2007 at 10:39.