Quote:
Originally Posted by Greg McKaskle
Technically, these are all possibilities, and it is a policy decision as to what makes the most sense for the organization and competition. At this point, I'm sure FIRST is listening, but any opinions you may have honestly aren't well founded. After a season, the feedback will carry much more weight.
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Greg,
Respectfully, I honestly don't think your opinions are well founded either. There are at least a few people in this thread that have experience with the cRIO platform. I personally have experience a PXI-RT/FPGA platform. The project I was discussing earlier was a graduate level project. I managed to use 32-bit Q-Math to cram the entire forward kinematics of a 3-DoF PHaNTOM haptic device on to a 1M gate FPGA, including the interface logic for my quad encoders, logic for virtual walls and the transverse Jacobian to translate my Cartesian forces back into joint space. If you're not familiar with robotics, that's, basically, one-half to one college ruled page of trig dependent non-linear equations. I've also been working with the C-based IFI controller since its inception. So I hope you believe that I might have some clue about this.
So, I think it was a valid opinion that it would be highly annoying to be forced to interface with custom sensors or encoders using fixed rate sampling or interrupts on the cRIO processor. My annoyance is based strictly on my personal dislike of compensating for hardware deficiencies in software AND NI's own literature lauding the flexibility and utility of this wonderful hardware that we're not going to actually be able to use, so I feel it's valid under the circumstances. I'll note that at the last control system change-over, we were given free reign over all the hardware on the PIC. The annoyance there was simply that so much of it was blocked off by buffers and other things necessary for safety.
I will agree that any opinion on how things will turn out in the 2009 season is entirely premature. However I think this is primarily because of the distinct lack of information available to us right now. The fact that the nature and utility of the FPGA code is still undetermined frankly makes me nervous. The fact that the development environments are still under development highly worries me. I do appreciate your willingness to discuss the nitty gritty of the RTOS and such with us, but since we don't know what sort of high speed or interrupt based processing we'll be needing on the RTOS nor what the structure of the code will be, I don't think I can ask any intelligent questions.
I think a lot of this angst and annoyance could have been taken care of if this system was closer to a prototype of the system going out to teams and farther from a demo piece put together by NI to sell us on the system. I know I would have been fine with more man hours spent on these TBD features and less man-hours spent on a pretty holonomic robot with a sponge canon and flashy interface that still on bears a resemblance to the environment and hardware we'll be working with.