Quote:
Originally Posted by lynca
I'm also interested in a datasheet for the microchip (on the CompactRio) that is generating the PWM pulses?
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Andrew,
There isn't going to be a datasheet past the data sheet for the cRIO chassis we're using. Virtually all the IO in a cRIO passes through the FPGA chip in the chassis, so that's where the PWM pulses are going to be generated. Given the fact that it's probably going to be running a loop at tens of kilohertz or more and has a 40MHz clock, the precision and resolution of the FPGA aren't a limiting factor. The sole difficulty is the update rate of the 9403 DIO card. Given that the other option is a 9401 with 100 ns update, but only 8 DIOs, I can understand the choice for the 9403. It bugs me, but I can understand it.
Also important to remember is that any inputs need to stay below about 140kHz if you're expecting to catch all the transitions. That's assuming a 50% duty cycle. So for quad encoders, I think it'd be smart to stay below 50k cycles per second. So a 1024 cycle per rev encoder should stay below 6000 RPM. I know that's going to be pretty hard to stay under given the 5,000 interrupts per second limit we've been operating under so far, but I'm sure you'll all manage somehow.