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Re: DO write speed
Its not just for parallel communication. It is a side effect of the fact that figuring out what to do is often harder than doing it. In designing a microprocessor, it is just as easy to have it update N* pins as it is to only update one. You might as well take advantage.
For serial devices like the cRIO module, it is often quicker to update them all so you don't have to do any addressing. For example, the relay pins on the DSC do just this. We send a reset signal and then clock every single pin out every time. The whole process takes on the order of N+4 clock cycles. If we were to do individual pin addressing, we'd have to clock out the address and then the pin value, which would be on the order of log2(N)+5 per pin. This would be quicker for one or two pins, but loses in a hurry if we are updating many pins.
Note that CAN is taking the opposite strategy: Since there are so many more registers to talk to, the overhead of addressing what you are talking to is worthwhile.
* If N is equal to or less than the width of the processor
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