Quote:
Originally Posted by Ether
Hi Alan,
Could you please elaborate a bit on this "counter" implementation?
i.e., Is the counter implemented in the FPGA so that it is independent of the cRIO main processor? Or is the counter implemented as a high-priority interrupt of the cRIO processor? Finally, how, in LabVIEW, does one set up such a counter?
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The counters (and encoders, for that matter) are handled by the FPGA.
The Sensors palette has the Counter functions in it. I don't have access to LabVIEW for FRC at the moment, so I can't be sure, but I think there's an example project showing how to open and read a counter. It works very much like an encoder, but with only one DIO connected