Quote:
Originally Posted by vamfun
Edit: Looking at the counter constructor for the quad encoder...seems that if
InitCounter(kExternalDirection);
is present then
SetDownSourceEdge(inverted, true);
has a special meaning. It sets direction externally with chan B rather than actually change the down count with chan B edges as the name implies. If this is the case, I really have the urge to yell at an overworked WPI programmer for this style of coding.
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This is directly related to the register interface for the counter IP in the FPGA where bits that are not used in a given mode are overloaded to control other parts of the logic. The real failure here is that I didn't clearly document what wicked things I was doing with those bits in the library code.
Allow me to do that here...
If you select "ExternalDirection" mode, then the following overloads apply:
"DownRisingEdge" specifies invert the direction or not.
"DownFallingEdge => true" enables quadrature decoding mode.
In quadrature decoding mode, "UpFallingEdge" selects 1x or 2x decoding and "UpRisingEdge" must be true... more literally, what these two mean in quadrature mode is:
"UpRisingEdge => count A if B is high"
"UpFallingEdge => count A if B is low"
Obvious, right? Again sorry for the confusion (I realize you probably aren't any less confused at this point).
Quote:
Originally Posted by vamfun
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Here are the much anticipated logic equations used in the 1x and 2x quadrature decoding mode of the counters.
Count = (ARising | AFalling) & ((BHigh & UpRisingEdge) | (BLow & UpFallingEdge))
CountUp = Count & !(BHigh ^ DownRisingEdge ^ ARising)
CountDown = Count & (BHigh ^ DownRisingEdge ^ ARising)
With this, there will hopefully be no more mystery.
See you in Atlanta!
-Joe