Quote:
Originally Posted by kamocat
Well, I just thought of another thing I'd like to be able to do:
The FPGA is capable of reading inputs at a much faster rate than the processor. Why not leverage this so that the FPGA can be used for short periods of high-speed data collection on the Analog inputs?
Say you configure the sample rate and the number of samples in begin.vi, and then you just use a VI to trigger the collection?
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The FPGA can't collect analog samples any faster than the ADC can digitize them.
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