View Single Post
  #23   Spotlight this post!  
Unread 07-07-2010, 15:55
Joe Ross's Avatar Unsung FIRST Hero
Joe Ross Joe Ross is offline
Registered User
FRC #0330 (Beachbots)
Team Role: Engineer
 
Join Date: Jun 2001
Rookie Year: 1997
Location: Los Angeles, CA
Posts: 8,572
Joe Ross has a reputation beyond reputeJoe Ross has a reputation beyond reputeJoe Ross has a reputation beyond reputeJoe Ross has a reputation beyond reputeJoe Ross has a reputation beyond reputeJoe Ross has a reputation beyond reputeJoe Ross has a reputation beyond reputeJoe Ross has a reputation beyond reputeJoe Ross has a reputation beyond reputeJoe Ross has a reputation beyond reputeJoe Ross has a reputation beyond repute
Re: Feedback Thread: WPILib

Quote:
Originally Posted by kamocat View Post
Well, I just thought of another thing I'd like to be able to do:
The FPGA is capable of reading inputs at a much faster rate than the processor. Why not leverage this so that the FPGA can be used for short periods of high-speed data collection on the Analog inputs?
Say you configure the sample rate and the number of samples in begin.vi, and then you just use a VI to trigger the collection?
Have you looked at the DMA examples?