PIC18F8520 port mapping to VEX microcontroller module.

[Yuriy]

Hello everyone,

I have searched for several days for the answers I seek with little success so I decided to just ask. I recently purchased a VEX starter kit and programming module after reading the system is designed around the PIC series of microcontrollers, specifically the 80-pin PIC18F8520. I have some experience programming with PIC and dsPIC devices and already have MPLAB and the C18/C30 compiler along with Hi-Tech and CCS PCWH C compilers. I understand the VEX microcontroller module consists of two 80-pin PIC18F8520 devices and is programmed via a serial/USB bootloader style format. What I’m not sure of is what exactly the Master PIC is responsible for and to what level if any can it be programmed/controlled? I realize it holds the bootloader that communicates with the IFI loader software via a USART I/O module and is what programs the second PIC via SPI which holds the user programmable software. I would guess that the Master PIC bootloader code is not being made public. So, what I would really like to know is what level of control I have over the 80-pin PIC18F8520 devices in the VEX microcontroller module? Can any one tell me what ports from the 80-pin PIC18F8520 devices correspond to on the VEX microcontroller module? As many of you already know the 80-pin PIC18F8520 has Ports A,B,C,D,E,F,G,H and J, knowing the actual hardware port being utilized would greatly help with the programming. Any information concerning hardware level control would be great as the documentation that came with the programming kit provides none.

[Kevin Sevcik]

First off, you'll find a lot of helpful information at Vexlabs, IFI's store dedicated to Vex. There's a FAQ there with some programming info. From what I understand, the master controller handles the RC communication and various other housekeeping tasks. It also has a watchdog timer to shut things down if the User processor is stuck in a loop.

As you surmise, source for the Master processor is not available. Compiled code is available if you really feel like reverse engineering it.

In the Downloads section at Vexlabs, you'll find default source code for the controller. There's an ifi_aliases.h file that aliases variables to pins on the User processor. All the pins on the controller as off the User processor, so you can use them all. There's a few CCP pins, but I didn't see any exceedingly interesting sets of pins available. I've attached the ifi_aliases.h file if you don't want to bother with the downloads.

[Yuriy]

Super fantastic!!!

Many thanks Kevin for the Vexlabs link and especially for the ifi_aliases.h header file, it is exactly what I was looking for. I was specifically looking for three pins PGM, PGC, and PGD which are multiplexed to port B at RB5, 6, and 7 and are being utilized as interrupt-on-change pins which map to the VEX microcontroller module interrupts ports 4, 5, and 6. I knew somebody would have the answer I only had to ask the question, thanks again Kevin.