FRC FPGA usage

[jhersh]

Originally Posted by Al Skierkiewicz

Joe,
Can you go into a little more depth on the safety issues with the FPGA? These are the used for field controls during a match, correct? Thanks.

The FPGA has a hardware watchdog timer that will stop all PWM, Relay, and Solenoid signals in the event that the RT processor does not indicate that the FMS is still allowing the robot to run. By keeping the FPGA inaccessible to teams, we can ensure that this functionality is not compromised and hence the robot is fail-safe.

-Joe