Maximum digital interrupt rate

[DM High Voltage]

We have an encoder on a rotating shooter wheel. The encoder generates 500 pulses per rev and we are running at 30 rps and generating 15000 pulses/sec. This rate is causing lag in our control system and intermitent communication failures. Does anyone know what the practical maximum interrupt rate is?

[RufflesRidge]

Are you actually using interrupts? If so, why not use the encoder class and let the FPGA handle the counting, then you'll see no change in your code regardless of how fast the shaft spins.

[Alan Anderson]

Interrupts don't enter into it. The FPGA can keep up with digital inputs that change more than 30,000 times a second. Even if you had signals that were too fast for it, it wouldn't cause any control lag. It would just produce inaccurate measurements.

[FrankJ]

A little background here Any program you write will be too slow to count encoder pulses directly. The encoder function calls relies on the FPGA part of the CRIO to do the actual counting. The FPGA is fast enough. Since you cannot program the FPGA, you have to rely on the encoder class to get your number.

You software types please excuse me if I mixed languages on the explanation.

[wireties]

Originally Posted by Alan Anderson

Interrupts don't enter into it. The FPGA can keep up with digital inputs that change more than 30,000 times a second. Even if you had signals that were too fast for it, it wouldn't cause any control lag. It would just produce inaccurate measurements.

I don't have the link handy but Ether referred me to a white paper that says the max count rate (by the FPGA) is around 44k/s. So the lag is not because of the 30K count rate unless he is using k2X or k4X for the mode. If so, switch to k1X.

HTH