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Originally Posted by Gdeaver
I'm suggesting that having 2 pic 18's and the interrupt for them to talk adds complications. Having 1 pic 18 and a pic 16or two on an expandable async bus would be less complex...
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I'm obviously not seeing what you are. How can having more processors and a more complicated communication bus end up being less complex? Even if the additional hardware is somehow easier, how can communicating between the user processor and multiple I/O processors be any simpler than communicating between the user processor and a single I/O processor?
I don't wish to sound like I'm trashing your ideas, but I honestly don't understand how they would make things any easier than they are now.
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