New C18 3.0+ Compatible FRC Code

[Mike Mahar]

Kevin, I have question about adc.c.
In Timer_4_ISR you have two for loops that cover the same range of indexes.

	if(samples >= adc_samples_per_update)
         	{
		// update the ADC result array
		for(i=0; i < num_adc_channels; i++)
		{
			adc_result[i] = (long)(accum[i] >> adc_result_divisor);
		}
		// reset the sample accumulator(s) to zero
		for(i=0; i < num_adc_channels; i++)
		{
			accum[i] = 0L;
		}
		// signal that a fresh sample set is available
		adc_update_count++;

		// start a fresh sample set
		samples = 0;
	}

Is there some reason that you don't reset the sample accumulator to 0 in the first loop?

if(samples >= adc_samples_per_update)
	{
		// update the ADC result array
		for(i=0; i < num_adc_channels; i++)
		{
			adc_result[i] = (long)(accum[i] >> adc_result_divisor);
                       // reset the sample accumulator to zero
                        accum[i] = 0L;
		}
	
		// signal that a fresh sample set is available
		adc_update_count++;

		// start a fresh sample set
		samples = 0;
	}

I'd think that any cycles saved in an ISR is a good thing.