NEW 2009 Control System Released

[Tom Line]

Originally Posted by Greg Marra

I've been using cRio's this semester. Compiling FPGA code takes from 5 minutes for a simple (simple!) program, to around 15 for a still-not-that-complex-but-does-more program. It finally made this xkcd comic make sense.

I admit to not being familiar with the acronyms you are using. VHDL? etc.

Is this specific to Labview or are you suggesting that even teams using Eclipse / etc and programming in C will see this kind of compile time?

IF that is the case, and C will take that long to compile for these applications, it may render it completely unusable if you have to do something that requires multiple compiles, like tuning a PID loop, unless you get more fancy and create the ability to adjust the constants with a pot / buttons etc.