Using Interrupts or DMA or timing to control digital I/O switch

[Ether]

Originally Posted by Alan Anderson

The counters (and encoders, for that matter) are handled by the FPGA.

The Sensors palette has the Counter functions in it. I don't have access to LabVIEW for FRC at the moment, so I can't be sure, but I think there's an example project showing how to open and read a counter. It works very much like an encoder, but with only one DIO connected

Thanks Alan.

Let me say back to you what I am understanding, so you can correct me if it's wrong:

- the programmer doesn't really need to know anything about FPGA. As far as the programmer is concerned, the code looks like all the other code.

- when LabVIEW compiles and deploys, it doesn't "re-program" the FPGA - it simply contains run-time initialization code that sets up the affected DIO port to be handled by existing FPGA code that has been pre-programmed by NI.

- when the program is running, the signal on the affected DIO channel is handled directly by the FPGA - the execution of the cRIO software is not affected in any way

- the FPGA contains a counter that is incremented by the FPGA code each time a leading edge (for example) is detected on the affected DIO port

- the cRIO software can read (and clear) the FPGA-maintained counter

Is that about right?


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