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#1
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Vex Ultrasonic Range Sensor (WPILib)
At 6:33 in this video, the instructor mentions that there is WPILib support for decoding the signal from the Vex Ultrasonic Range sensor mentioned at 4:17 in the video. Can someone familiar with the relevant WPILib code please clarify how the time to receive the reflected ping is determined? Specifically, is a hardware interrupt set up to detect the reflected ping? If so, does the ISR for that interrupt do the timestamping, or does the ISR just set a flag alert the scheduler to run a task which does the timestamping? Or is the reflected signal detected by polling, and if so, what is the polling frequency and priority? |
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#2
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Re: Vex Ultrasonic Range Sensor (WPILib)
It sets up a counter fpga object in semi-period mode.
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#3
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Re: Vex Ultrasonic Range Sensor (WPILib)
Thanks Joe. So it would be polled at 1MHz* by FPGA?
*polling frequency increased from 153KHz (2014) to 1MHz (2015)? |
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#4
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Re: Vex Ultrasonic Range Sensor (WPILib)
Yes
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