The roboRIO has two FPGAs?

Most people know that the rio has a Xilinx Zynq SoC, and it’s integrated FPGA is usually referred to as “the” rio FPGA, but it actually has another: a Lattice MachXO2-640. Does anyone know what it might be for? Peter (WPILIB) suggested maybe power sequencing or UVLO which would make sense since it’s non-volatile and boots quickly.

I found it while messing around with the rio JTAG port:

Info : JTAG tap: auto0.tap tap/device found: 0x012b9043 (mfg: 0x021 (Lattice Semi.), part: 0x12b9, ver: 0x0)
Info : JTAG tap: tap/device found: 0x23727093 (mfg: 0x049 (Xilinx), part: 0x3727, ver: 0x2)
Info : JTAG tap: zynq.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)


This is getting out of hand. Now there are two of them!


Unexpected Star Wars.


Ooh. Do you have any way to dump the bitstream?

I was gonna look into if I can dump the flash. The iCE40 bitstream has already been reverse engineered and I know that someone is working on doing the same for the MachX02, so it could be pretty cool to get that.

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looks like a small CPLD or FPGA, only has 640 LUTs or Logic gates. Chances are it is being used as a either power control or in the recovery/programming of the Zynq FPGA.


The Xilinx Zynq FPGA should be the main FPGA while the Lattice iCE 40 FPGA is probably used for programming the Zynq FPGA. I can’t confirm this based on the information I have now, but based on reverse engineering other devices, this is what I think it is being used for.

For example the Arduino board has the main Microcontroller (Microchip Atmega328p) and a programmer microcontroller (Microchip Atmega16U2). FPGAs are pretty much a powerful microcontroller. They are the closest you can get before making an ASIC.

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I think only the Xilinx Zynq FPGA is used for the the main controller.

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This is outrageous! It’s unfair!


I guess you may be able to hack it, but I don’t think it connects to any IO pins. So IDK if it is going to be any use.

I also don’t think FIRST allows hacking these things, but I may be wrong.

I have a Zynq based board sitting on my desk right now. It’s similar to the main Rio chip in that it also has an ARM soc attached. To my knowledge, I definitely don’t need another FPGA to program the onboard FPGA, so I’m not sure what this post is on about. I’m not entirely sure why one would need an FPGA to program an FPGA - what programs the Lattice FPGA?

Or maybe we’re overestimating National Instruments a little bit, and the Lattice is really being used to manage the main Rio chip.

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That could also be possible.

From what I’ve read the FSBL boot code is loaded from JTAG or flash memory, and is responsible for programming the PL with a bitstream during the boot process. I’m not sure what role you’re suggesting the MachX02 would play here. Comparing it to the Atmega16U2 used for usb to serial on an Arduino is pretty apples to oranges.

Oops sorry, I’m not very good at this.

It’s treason then.

Oh, I’m just giving ya a hard time by responding only with obscure star wars quotes. :smiley:

Agreed, no practical uses from an FRC perspective. Nifty to know it exists!

Though it’s absolutely not required, it would be kinda cool if NI released full schematics for the roboRIO. I’d study those with great interest!


I found this (and the one directly above) too funny.

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I dunno man, that’s how you get low-effort copycats, and NI would never be okay with that.


Almost all of these can run NI RT Linux (at least the Zynq 7K ones):

It does take a bit of doing to get it running.

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I mean Digilent didn’t have access to the Talon SRX schematic and they still were able to copy it verbatim. Then CTRE won a settlement against them. It wasn’t a lack of access to schematics that stopped Digilent from copying CTRE, but legal action.